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2014-10-02mmc: sdhci: tegra: initialize local variableBibek Basu
Initialize uninitialized variable vmin_tap_hole & vmax_tap_hole Bug 200042035 Change-Id: I5e9303f2b585423d936b289a59228028275ec5ec Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/542582 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-10-02firmware: enable default printing of direct loadingBibek Basu
Move pr_dbg to pr_info for direct firmware loading. Bug 200026940 Change-Id: I617fde8aac85be01857b963c0e18ae6cf22aa444 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/542581 GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-09-26gpu: nvgpu: Increase PBDMA timeoutTerje Bergstrom
PBDMA timeout can cause stale data in FIFO. Default value equals 1ms. Increase it to max. Bug 1537636 Change-Id: I1c6c6b10abaece3a64b77b9b3ef77ff726ff67cf Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/457047 (cherry picked from commit f516652f567a44e2e1c6313dccd3dc80172a980f) Reviewed-on: http://git-master/r/457067 (cherry picked from commit f5219cf5888502de3f6cabb2db3e8968b6d20b7c) Reviewed-on: http://git-master/r/504534 Reviewed-by: Automatic_Commit_Validation_User
2014-09-26media: tegra_v4l2_camera: set clock rate for pll_dBryan Wu
Test pattern generator in VI needs PLL_D running at certain clock rate, then CSI clock is a child of PLL_D can get the right clock for operation. If DC disable DSI and set PLL_D as a very low frequency and VI driver forgets to set PLL_D rate back, test pattern generator won't work. This patch will set PLL_D as 927M when we do test pattern generator testing. Bug 1515755 Change-Id: I8fd27d193a436e1057ce2bce8f8153630dc5cdce Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/489043 (cherry picked from commit e09393ad2a02309f63a3baeb567460e1e2f79cd9) Reviewed-on: http://git-master/r/498938 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-09-26media: tegra_camera: vi2: support for real sensorBryan Wu
Add code to support RAW10 capture from real sensor like IMX135. Add flag to skip register program from second frame. Fix sync point operations. Bug 1380143 Change-Id: I19bcd17ddfba0e16b4b3a34ae8a4e5a0119e85e1 Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/337470 (cherry picked from commit ff1055fa436ffb5c1d57eee2e09c17578774d65f) Reviewed-on: http://git-master/r/498936 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-09-26media: soc_camera: add imx135 sensor driverBryan Wu
Sony IMX135 camera sensor can be found on Ardbeg/Laguna. This patch introduced sensor driver for imx135 using soc_camera interface. Bug 1380143 Change-Id: Ifa0becf1ec2d9931ebf9ea3a4e9ea3e1013a9e36 Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/337469 (cherry picked from commit 94a04c2c9b614519aab6f718d60bcf1d8032aa8f) Reviewed-on: http://git-master/r/498935 GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-09-26video: tegra: nvmap: remove support for Deprecated GET_ID/FROM_ID ioctl'sManeet Singh
Remove support and add warning message for deprecated IOCTL's - NVMAP_IOC_FROM_ID and NVMAP_IOC_GET_ID. These ioctl calls are deprecated by corresponding FD ioctl calls. Bug 1553082 Change-Id: I3cd531422293f19496687f346692fa91ebe58a40 Signed-off-by: Maneet Singh <mmaneetsingh@nvidia.com> Reviewed-on: http://git-master/r/498045 (cherry picked from commit 420dce0a99231453ebbd091f110d0de816e4885e) Reviewed-on: http://git-master/r/538987 GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-09-26video: tegra: nvmap: fix use-after-free race conditionManeet Singh
Incremented nvmap_handle ref count in utility function nvmap_get_id_from_dmabuf_fd() before the function release reference to dma buffer. This is required to avoid race conditions in nvmap code where nvmap_handle returned by this function could be freed concurrently while the caller is still using it. As a side effect of above change, every caller of this utility function must decrement nvmap_handle ref count after using the returned nvmap_handle. Bug 1553082 Change-Id: Iffc2e5819f8b493d5ed95a9d0c422ccd52438965 Signed-off-by: Maneet Singh <mmaneetsingh@nvidia.com> Reviewed-on: http://git-master/r/498135 (cherry picked from commit afddea745cc4f4a824be501ecbbb50f55e7e6f04) Reviewed-on: http://git-master/r/538986 GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-09-26video: tegra: nvmap: cleanup redundant functionsManeet Singh
Removed redundant function unmarshal_user_id() and replaced it with unmarshal_user_handle() which it internally calls without any other changes. Bug 1553082 Change-Id: I7d998966c593f11a3322b0503ef11311fc1ae5e7 Signed-off-by: Maneet Singh <mmaneetsingh@nvidia.com> Reviewed-on: http://git-master/r/498103 (cherry picked from commit 4880b6c2bdf5b10e4a71b5b79e7878343b9e7e3b) Reviewed-on: http://git-master/r/538985 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-09-24video: tegra: host: gk20a: reduce gr delaysPrashant Malani
The delay value used in gr usleep_range calls is too high. We can start at a much lower value. Bug 200032452 Change-Id: I7d196d0e3be0a5cd84e8c4dad537fae043da6274 Signed-off-by: Prashant Malani <pmalani@nvidia.com> Reviewed-on: http://git-master/r/335234 (cherry picked from commit 49bb8436a534496c70e6238d3bc20ed280d5b654) Reviewed-on: http://git-master/r/504632 Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-09-19edp: sysedp : CPU/GPU priority depends on fGPUMatt Longnecker
Provide sysedp_dynamic_capping with the instantaneous GPU frequency when notifying it of the GPU load. Modify the gpu/cpu priority decision logic to choose CPU priority until GPU frequency gets "near" the CPU-priority-limited-GPU-fmax. Introduce the priority_bias debugfs parameter to facilitate tuning of "near". priority_bias takes a value from 0 to 100. Change-Id: I57df17d50cd8077a512b5932f4a304ca5e6992aa Signed-off-by: Matt Longnecker <mlongnecker@nvidia.com> Reviewed-on: http://git-master/r/481720 (cherry picked from commit b2ac745a45e273e849d7b190913ee97092fdebc2) Reviewed-on: http://git-master/r/498901 GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-09-18video: tegra: dc: Avoid FRAME_END_INT conflictDaniel Solomon
Allowing for dc->lock to be acquired by the caller in function tegra_dc_config_frame_end_intr can result in FRAME_END_INT mask register being overwritten if the lock is actually acquired by another thread. Refactor the critical section into its own function and allow callers to call either function. Also Change the name of tegra_dc_wait_for_frame_end to indicate that it should be called with dc->lock locked. Bug 1534724 Change-Id: I87b1fc529f29f707a1bdadf18efa6bb19d6966b3 Signed-off-by: Daniel Solomon <daniels@nvidia.com> Reviewed-on: http://git-master/r/456988 (cherry picked from commit ec9b7f555b9648e3aee0cd9781a92b14178a3344) Reviewed-on: http://git-master/r/496581 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jong Kim <jongk@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Tested-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-09-18video: tegra: dc: Fix and refactor FRAME_END_INTDaniel Solomon
- Fix a conflict with other DC interrupt masks when the DSI driver waits on FRAME_END_INT - Move generic FRAME_END_INT mask/unmask and wait-for functions to dc.c Bug 1534724 Change-Id: I40e26ada2f0494782979e32c1a22906361b214b5 Signed-off-by: Daniel Solomon <daniels@nvidia.com> Reviewed-on: http://git-master/r/451186 (cherry picked from commit 24a39c49f63eea704003ee27296f1f70d46bcbd0) Reviewed-on: http://git-master/r/496580 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jong Kim <jongk@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Tested-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-09-17ata: Skip ahci dump call if probe is not ivokedPreetham Chandru R
Skip ahci dump call if probe is not ivoked and even if CONFIG_TEGRA_SATA_IDLE_POWERGATE is not defined Bug 200010376 Change-Id: I4ec5f6643b3bc0dbbebbd65b6085d9ea2353eac1 Signed-off-by: Preetham Chandru R <pchandru@nvidia.com> Reviewed-on: http://git-master/r/455571 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Venkata Jagadish <vjagadish@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-09-16usb: xhci: tegra: remove PCIe dependencyHaribabu Narayanan
PCIe powergating dependency is now handled internally in the powergating module for t12x/t13x. This patch removes PCIe related powergating calls from XHCI driver for tegra. Bug 1451279 Bug 1524744 Bug 200027067 Change-Id: I0752cd745f218266e1636cc7c40a6c29dee3b3d4 Reviewed-on: http://git-master/r/424036 (cherry picked from commit 91e2bd6728ca1969615081c70be6b2f21acd43d5) Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-on: http://git-master/r/498662 Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-09-16usb: xhci: tegra: remove conditional powergatingHaribabu Narayanan
The powergate module now maintains reference count for PCIE. Remove conditional checks in XHCI driver before invoking powergating APIs. Bug 1451279 Bug 1455032 Bug 200027067 Change-Id: I186270dc86fba78a8c321ba5923382e642b14b60 Reviewed-on: http://git-master/r/418061 (cherry picked from commit b0f746945fccf025e2ab1764c0cc35eb1bc780b3) Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-on: http://git-master/r/498660 Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-09-15pinctrl: tegra: fix pinconfig_group_setBibek Basu
Prepare config using param parameter to generate the right value for pinmux register Bug 200033491 Change-Id: I973cc449e8cf89cb3b6f5b5da1021d21d193b47d Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/496827 (cherry picked from commit 418c027e40353a4b99fe7fcfbc0743de7e07d15c) Reviewed-on: http://git-master/r/498329 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-09-15pinctrl: tegra: set tristate =1 and input =0 for unused pinsLaxman Dewangan
Set the tristate bit to 1 and e_input to 0 for unused pins to set it on low power and avoid conflict with any other pins. Bug 200033491 Change-Id: If83f6129dbf6c6fe28a7a7c596e5a3858a894914 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/416649 (cherry picked from commit 7e81b36f87cffdc5d473a39735877a1432ac3151) Reviewed-on: http://git-master/r/498328 GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Tested-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-09-15pinctrl: tegra: configure pins for gpio directionLaxman Dewangan
If pin is configured on gpio mode and set for input direction then set e_input = 1 and if pin is set for output direction then set tristate = 0 for that pin. Bug 200033491 Change-Id: Ibcae17ad8bf4e45f0c74eb68d3bf975078fb67d6 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/416650 (cherry picked from commit 3dbac8e8382be0766e221c3f47f6254538b17030) Reviewed-on: http://git-master/r/498327 GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Tested-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-09-15gpio: tegra: call pinctrl dirctions apis on direction input/outputLaxman Dewangan
Set the pins in different direction based on client request from gpio. This will help to non-tristate the pin on gpio output mode or enable input on gpio input mode without any explicit condition. Bug 200033491 Change-Id: I074451e344bfd8465aceb39c1091809da4f58f58 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> (cherry picked from commit c520a6048a942b5870f560979045c74659c8fe76) Reviewed-on: http://git-master/r/#/c/415991/ Reviewed-on: http://git-master/r/498326 Reviewed-by: Winnie Hsu <whsu@nvidia.com> Tested-by: Winnie Hsu <whsu@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-09-15gpio: tegra: Enable pinctrl_request_gpioshravanid
Call pinctrl_request_gpio when gpio is requested by tegra_gpio_request Bug 200033491 Change-Id: I0e0a129adf51775edaa5887b11188f0ed1776e0e Signed-off-by: shravanid <shravanid@nvidia.com> Reviewed-on: http://git-master/r/404352 (cherry picked from commit 7ba0a34569bff25730406a4c54967e4e2c470cbc) Reviewed-on: http://git-master/r/498325 GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Tested-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-09-08tegra: fb: Notify fbcon DC is unavailablePankaj Dabade
In the absence of hotplug, monitor data and mode database is removed and DC is switched off. However, fbcon is unaware. This patch adds the change to fb_info state to suspend while updating monitor specs. This state will denote that the hardware is unavailable. Info will be restored to state running once modelist is available. Bug 200031817 Change-Id: I0d4a51fdaa383d9201ab299d602fb3cc9ed93f52 Signed-off-by: Pankaj Dabade <pdabade@nvidia.com> Reviewed-on: http://git-master/r/496027 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-09-03pwm: Add sysfs interfaceH Hartley Sweeten
Add a simple sysfs interface to the generic PWM framework. /sys/class/pwm/ `-- pwmchipN/ for each PWM chip |-- export (w/o) ask the kernel to export a PWM channel |-- npwm (r/o) number of PWM channels in this PWM chip |-- pwmX/ for each exported PWM channel | |-- duty_cycle (r/w) duty cycle (in nanoseconds) | |-- enable (r/w) enable/disable PWM | |-- period (r/w) period (in nanoseconds) | `-- polarity (r/w) polarity of PWM (normal/inversed) `-- unexport (w/o) return a PWM channel to the kernel Based on work by Lars Poeschel. Bug 200028381 Change-Id: I0c9c6ad2ca7173e6fc3fbe1d3cd3963cde00539a Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Ryan Mallon <rmallon@gmail.com> Cc: Rob Landley <rob@landley.net> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Bibek Basu <bbasu@nvidia.com> (cherry picked from commit 76abbdde2d95a3807d0dc6bf9f84d03d0dbd4f3d) Reviewed-on: http://git-master/r/455068 (cherry picked from commit b1824bc0325f84ea04dab7d6d4f7c887c80b1982) Reviewed-on: http://git-master/r/488690 GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com> Tested-by: Winnie Hsu <whsu@nvidia.com>
2014-09-03tegra: dc: dont synchronize irq from irq threadBibek Basu
Synchronizing IRQ from irq thread context will never return because the thread will sleep forever.And thats the reason for DPM timeout and kernel crash when suspend hook also tries to do so. [ 204.471652] tegradc tegradc.1: **** DPM device timeout **** [ 204.484865] [<c07a58a8>] (__schedule+0x3b4/0x6e0) from [<c00ccf94>] (synchronize_irq+0xac/0xe4) [ 204.501399] [<c00ccf94>] (synchronize_irq+0xac/0xe4) from [<c0341628>] (tegra_dc_suspend+0xcc/0x15c) [ 204.518507] [<c0341628>] (tegra_dc_suspend+0xcc/0x15c) from [<c03da574>] (platform_pm_suspend+0x58/0x64) [ 204.536166] [<c03da574>] (platform_pm_suspend+0x58/0x64) from [<c0032c00>] (tegra_pd_suspend_dev+0x34/0x9c) [ 204.554226] [<c0032c00>] (tegra_pd_suspend_dev+0x34/0x9c) from [<c03e5384>] (pm_genpd_default_suspend+0x24/0x30) [ 204.572942] [<c03e5384>] (pm_genpd_default_suspend+0x24/0x30) from [<c03e5864>] (pm_genpd_suspend+0x58/0xa4) [ 204.591515] [<c03e5864>] (pm_genpd_suspend+0x58/0xa4) from [<c03dfb30>] (dpm_run_callback+0x34/0x54) [ 204.609552] [<c03dfb30>] (dpm_run_callback+0x34/0x54) from [<c03dffe4>] (__device_suspend+0x16c/0x380) Bug 1486344 Change-Id: Ie512262fdfef90dc199f1f39ebffb540b909f3e2 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/450815 GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-08-29video: tegra: nvmap: track handle's mapped memoryManeet Singh
Added new file "maps" for nvmap heaps. In addition to data given by existing "allocations" file, this also shows the client's virtual mappings and total amount of handle physical memory that is actually mapped to a client's virtual address space. This change will help in tracking nvmap memory usage of processes. Bug 1529015 Change-Id: I85b5c221c7a7475cbc3585b130fda6a282756662 Signed-off-by: Maneet Singh <mmaneetsingh@nvidia.com> Reviewed-on: http://git-master/r/448503 (cherry picked from commit 1f632679174cea962406980c8201d63c163635ee) Reviewed-on: http://git-master/r/448580 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2014-08-26dma:coherent: manage resizable memory with single deviceKrishna Reddy
This is necessary to avoid unusable memory between device nodes. Bug 1517584 Change-Id: I37ac104fa5e512758a4df299424fa0456f368bb6 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/486855 (cherry picked from commit 5c76b9162730826191c71fcf082d3457e5496bc0) Reviewed-on: http://git-master/r/488266 GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-08-26cpufreq: ondemand: Remove redundant return statementStratos Karafotis
After commit dfa5bb622555 (cpufreq: ondemand: Change the calculation of target frequency), this return statement is no longer needed. Bug 1359622 Change-Id: I277187f3e5cbbc205524d678f95a36d65e6c8ff8 Reported-by: Henrik Nilsson <Karl.Henrik.Nilsson@gmail.com> Signed-off-by: Stratos Karafotis <stratosk@semaphore.gr> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> (cherry picked from commit 880eef041655b35f9aa488726ea3c4303a4f2204) Reviewed-on: http://git-master/r/482372 Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-08-26cpufreq: governors: Remove duplicate check of target freq in supported rangeStratos Karafotis
Function __cpufreq_driver_target() checks if target_freq is within policy->min and policy->max range. generic_powersave_bias_target() also checks if target_freq is valid via a cpufreq_frequency_table_target() call. So, drop the unnecessary duplicate check in *_check_cpu(). Bug 1359622 Change-Id: I2057504a85cc773f98497285cf9e62e5a15c09ea Signed-off-by: Stratos Karafotis <stratosk@semaphore.gr> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> (cherry picked from commit 934dac1ea072bd8adff8d6a6abba561731e093cf) Reviewed-on: http://git-master/r/482371 Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-08-26cpufreq: Clean up header files included in the coreViresh Kumar
This patch addresses the following issues in the header files in the cpufreq core: - Include headers in ascending order, so that we don't add same many times by mistake. - <asm/> must be included after <linux/>, so that they override whatever they need to. - Remove unnecessary includes. - Don't include files already included by cpufreq.h or cpufreq_governor.h. Bug 1359622 [rjw: Changelog] Change-Id: I3d69d7243b982cd2e32abfdfb9dd750843a07629 Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> (cherry picked from commit 5ff0a268037d344f86df690ccb994d8bc015d2d9) Reviewed-on: http://git-master/r/482370 Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-08-26cpufreq: ondemand: Change the calculation of target frequencyStratos Karafotis
The ondemand governor calculates load in terms of frequency and increases it only if load_freq is greater than up_threshold multiplied by the current or average frequency. This appears to produce oscillations of frequency between min and max because, for example, a relatively small load can easily saturate minimum frequency and lead the CPU to the max. Then, it will decrease back to the min due to small load_freq. Change the calculation method of load and target frequency on the basis of the following two observations: - Load computation should not depend on the current or average measured frequency. For example, absolute load of 80% at 100MHz is not necessarily equivalent to 8% at 1000MHz in the next sampling interval. - It should be possible to increase the target frequency to any value present in the frequency table proportional to the absolute load, rather than to the max only, so that: Target frequency = C * load where we take C = policy->cpuinfo.max_freq / 100. Tested on Intel i7-3770 CPU @ 3.40GHz and on Quad core 1500MHz Krait. Phoronix benchmark of Linux Kernel Compilation 3.1 test shows an increase ~1.5% in performance. cpufreq_stats (time_in_state) shows that middle frequencies are used more, with this patch. Highest and lowest frequencies were used less by ~9%. [rjw: We have run multiple other tests on kernels with this change applied and in the vast majority of cases it turns out that the resulting performance improvement also leads to reduced consumption of energy. The change is additionally justified by the overall simplification of the code in question.] Bug 1359622 Change-Id: Ibcbee5afef154c47e3ae45e133f3a0435d2a4fec Signed-off-by: Stratos Karafotis <stratosk@semaphore.gr> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> (cherry picked from commit dfa5bb622555d9da0df21b50f46ebdeef390041b) Reviewed-on: http://git-master/r/482369 Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-08-21gpu: nvgpu: Never use KEPLER_C sync point incrementTerje Bergstrom
Bug 1497928 Change-Id: Ic3a2923ae73792e87145b6211e45e5ace3651ddc Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/482492 GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Tested-by: Prabhu Kuttiyam <pkuttiyam@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-08-20media: platform: tegra: support 64 bit user codeCharlie Huang
Since the user space code may works in either 32 or 64 bit mode, attentions should be taken while passing pointers from user space to the kernel. In this case, the p_value of struct nvc_param and power_on/power_off of struct virtual_device received from the user space should be handled properly. The solution is to create a set of 32 bit version of structures nvc_param and virtual_device along with some dedicated 32 bit mode ioctl commands, then in the ioctl functions, the 32 bit user mode access will be handled separately. bug 1518359 Change-Id: I4cbbeeaef446ab962aaa1f92251ce1fd9d5723aa Signed-off-by: Charlie Huang <chahuang@nvidia.com> Reviewed-on: http://git-master/r/437390 (cherry picked from commit 3fdbc210fc9f33d0f89af079a89bdb1f41e73ecb) Reviewed-on: http://git-master/r/482230 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
2014-08-18fbcon: Converting benign message to debug printPankaj Dabade
Making message "Display is GTF capable" as a debug print. Bug 1541801 Change-Id: Ic926057e2ac4f6fc0b85488f642c5cc0c74bda2b Signed-off-by: Pankaj Dabade <pdabade@nvidia.com> Reviewed-on: http://git-master/r/457056 GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-08-15video: tegra: nvmap: clean cache during page allocations into page poolKrishna Reddy
Clean cache during page allocations into page pool to avoid cache clean overhead at the time of allocation. Increase page pool refill size to 1MB from 512KB. Bug 1539190 Change-Id: I046289f5e4b52986f477890663bbc7b2cda76c25 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/453197 (cherry picked from commit 39b0d737566adca113baac1de61f6550634da4ea) Reviewed-on: http://git-master/r/456780 Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> GVS: Gerrit_Virtual_Submit
2014-08-15video: tegra: adf: replace nvmap_alloc_dmabuf with v4l2 APIKrishna Reddy
Replace deprecated nvmap_alloc_dmabuf with V4L2 videobuf2 contig dma API. Bug 1540346 Change-Id: I06dd4a64a5a548d29443a0dfb8e4ccdeee62644c Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/450681 (cherry picked from commit 9fa74918f508958b99d0314581683969454f9eb3) Reviewed-on: http://git-master/r/456779 Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> GVS: Gerrit_Virtual_Submit
2014-08-15video: adf: fix incorrect dependency on DMA_SHARED_BUFFERKrishna Reddy
ADF should select DMA_SHARED_BUFFER instead of depending on it. Bug 1540346 Change-Id: I6e9e83df1e30834d072a86b525f80461e1b13e62 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/451063 (cherry picked from commit 2b9e7d3bda3ad1bd4259d85b533d95ff57ea6c47) Reviewed-on: http://git-master/r/456778 Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com> GVS: Gerrit_Virtual_Submit
2014-08-13usb: phy: tegra: increase the timeout for phy clkPreetham Chandru R
Increase the timeout for phy clk to stabilize Bug 1485579 Signed-off-by: Preetham Chandru R <pchandru@nvidia.com> Change-Id: Ic73436dd5b74f327707b0c36ef0323d6decd9c67 Reviewed-on: http://git-master/r/408597 (cherry picked from commit 921b5ba58fc4e9427824d16bd3648055ca11b37c) Reviewed-on: http://git-master/r/455528 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-08-12usb: gadget: mtp : Handle ioctl MTP_SEND_EVENT_32Rohith Seelaboyina
MTP_SEND_EVENT_32 is defined for 64bit kernel. This changes properly fixes handling of 32-64 bit ioctl call for mtp_send_event. Bug 200016543 Change-Id: Ife559ecb31d10fdfe17d34c8a132cbaf04b09082 Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com> Reviewed-on: http://git-master/r/450869 (cherry picked from commit baf0ecf975bafbe3031b81e3c1899e011c8e0a21) Reviewed-on: http://git-master/r/454868 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-08-08video: tegra: nvmap: track handle's vma listManeet Singh
Patch includes following nvmap changes: - added "pid" field in nvmap_vma_list so now looking at handle's vma list, we can say which vma belongs to which process. - sorted handle's vma list in ascending order of handle offsets. Bug 1529015 Change-Id: Ide548e2d97bab8072461c11c9b8865ab4aa01989 Signed-off-by: Maneet Singh <mmaneetsingh@nvidia.com> Reviewed-on: http://git-master/r/448493 (cherry picked from commit 37132fa461d23552b805e32d268acd14b27588c3) Reviewed-on: http://git-master/r/448576 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Winnie Hsu <whsu@nvidia.com>
2014-08-08video: tegra: nvmap: remove carveout commit accountingKrishna Reddy
Remove obsolete carveout commit accounting. Bug 1529015 Change-Id: If7e25ca2ef43c036558c9c9ead5f67ee8eef6b42 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/426734 (cherry picked from commit c1ddad1b13332386857f9f2964aa8968094e7e8c) Reviewed-on: http://git-master/r/448554 Tested-by: Winnie Hsu <whsu@nvidia.com>
2014-08-08video: tegra: nvmap: unify debug stats codeKrishna Reddy
Unify debug stats code for iovmm and carveouts. Bug 1529015 Change-Id: Ief800587870845ed6f566cb7afb2c91000d177ca Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/426733 (cherry picked from commit 0c0f7e5a9ef459d7940cc66af0a00321bb54d389) Reviewed-on: http://git-master/r/448536 Tested-by: Winnie Hsu <whsu@nvidia.com>
2014-08-08video: tegra: nvmap: don't count shared memory in fullKrishna Reddy
Don't count shared memory in full in iovmm stats. Add SHARE field to allocations info to show how many processes are sharing the handle. Update few comments in the code. Remove unnecessary iovm_commit accounting. Bug 1529015 Change-Id: I49650bf081d652dedc7139f639aae6da06965ecd Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/426274 (cherry picked from commit 92d47c10fbf7a315d4c953bafb71ee23032b7f65) Reviewed-on: http://git-master/r/448533 Tested-by: Winnie Hsu <whsu@nvidia.com>
2014-08-08video: tegra: nvmap: set handle dmabuf to NULL earlyKrishna Reddy
This can allow catching handle dmabuf usage during its free. Bug 1529015 Change-Id: Ie20c7b860ca5194a190ff7005302bf50602d16ed Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/424329 (cherry picked from commit 10e648c2e2f9760c97ce55a1091d9e7097d2504d) Reviewed-on: http://git-master/r/448530 Tested-by: Winnie Hsu <whsu@nvidia.com>
2014-08-08video: tegra: nvmap: add handle share count to debug statsKrishna Reddy
handle share count provides info on how many processes are sharing the handle. IOW, how many processes are holding a ref on handle. Update the comments for umap/kmap_count. Bug 1529015 Change-Id: I9f543ebf51842dad6ecd3bfeb7480496c98963be Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/426302 (cherry picked from commit 244c41508be0705cc232942b9403e17611f63e45) Reviewed-on: http://git-master/r/448521 Tested-by: Maneet Maneet Singh <mmaneetsingh@nvidia.com>
2014-08-05pcie: tegra: dynamic link speed & clock settingBibek Basu
Based on the capability of card, we should dynamically set the mselect, pciex clock and link speed selection. Clocks will be set to support the highest capable card This patch: 1. enable the clocks to minimal value during boot 2. Based on card capability, it boosts the clocks 3. And train the link Bug 1483608 Change-Id: Iaf90f9b06846f8e23e4f60d1670a1db9ec562257 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/437560 (cherry picked from commit ada2f21676de75332ad906fa2386a74f9d58f94a) Reviewed-on: http://git-master/r/448072 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vidya Sagar <vidyas@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-08-04gpu: nvgpu: fix error handling for mutex_acquire()Deepak Nibade
Currently if pmu_mutex_acquire() fails, we disable ELPG and move ahead. But it is not clear why it is required to disable ELPG in case where we fail to acquire mutex. Hence skip disabling ELPG if mutex_acquire() fails Bug 1533644 Change-Id: I7e8e99a701d0ba071eb31ac17582b04072ee55eb Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/448131 (cherry picked from commit 789c256dd74e2b2b0481e25b2af1b2202ea6f582) Reviewed-on: http://git-master/r/450268 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Naveen Kumar S <nkumars@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-07-23gpu: nvgpu: return error from mutex_acquire() if pmu not initializedDeepak Nibade
In pmu_mutex_acquire(), we return zero (success) if pmu->initialized is not set Since mutex_acquire() was successful, we then call pmu_mutex_release() If now pmu->initialized is set in some other thread then we proceed to validate the mutex owner and end up causing below warning : pmu_mutex_release: requester 0x00000000 NOT match owner 0x00000008 Hence to fix this return error from mutex_acquire() and mutex_release() if pmu->initialized is not yet set and in that case we proceed to call elpg enable/disable Bug 1533644 Bug 200017082 Change-Id: Ifbb9e6a8e13f6478a13e3f9d98ced11792cc881f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Signed-off-by: Naveen Kumar S <nkumars@nvidia.com> Reviewed-on: http://git-master/r/439333 (cherry picked from commit 50497d4031103df1067f14ce4c1e14b15713efb9) Reviewed-on: http://git-master/r/440747 GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-07-18video: tegra: dc: remove low latency cursor supportJon Mayo
There is no difference in latency. Bug 1333484 Change-Id: I8c1acb14d62df51cac535b2b78df0070744a5b66 Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/436700 (cherry picked from commit 6eff7bd5a3a858e92c1088c102b21e86e12bf35b) Reviewed-on: http://git-master/r/439915 Tested-by: Jong Kim <jongk@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-07-18video: tegra: dc: track cursor stateJon Mayo
save and restore cursor state for suspend and resume. Bug 1486452 Bug 200006001 Change-Id: If5db728a0bca436f0c12ec3de56c4fec9b3d3328 Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/436316 (cherry picked from commit bec916df2e450d763a912be37b783450aaf5b862) Reviewed-on: http://git-master/r/439914 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Jong Kim <jongk@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-07-18video: tegra: dc: move cursor into core driverJon Mayo
Move cursor routines into the core driver, provide a small abstraction layer to update the cursor. Change-Id: Idfa1c6b313806de6a5d34f9f05592574f5829933 Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/436315 (cherry picked from commit 14e65ae70661462aa50f424a04a65a7c0efd9ff9) Reviewed-on: http://git-master/r/439913 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Jong Kim <jongk@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-28 13:27:47 +0000