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This patch add device drvier for novatek touch screen driver.
This touch screen chip will be support because it have
more populary screen size.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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ASoC ESAI machine driver and pcm platform driver use the APIs from mxc_asrc.c,
but once ASRC is used as a loadable module, these files can't find the APIs
from this ko. In this patch, we use 'asrc_p2p_hook' to hook the APIs which will
be used in ASoC ESAI machine driver and pcm platform driver.
Signed-off-by: Ge Lei <b42127@freescale.com>
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In this patch, add interface to modify ASRC input/output watermark.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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* Add csi_tx_addr, so it can override slave addr
for adv7280 tvin decoder device
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
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To finish a buffer convert in ASRC, user should 1. prepare input buffer,
2. prepare output buffer 3. wait for output buffer's completion 4.wait
for input buffer's comletion. The flow make user application ugly.
In this patch, pack steps above to 1 stop: ASRC_CONVERT.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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ASRC driver use DMA to transfer data from ASRC output FIFO to memory.
However, DMA way require the data number in ASRC output FIFO being larger
than watermark level. Thus a dma request can trigger a DMA burst. For
the last period of output data, its number is possiblely less than output
FIFO watermark level. In this case, the output DMA would pending for the
last period of output data until timeout.
In this patch:
1 divide expected output data length into 2 parts: DMA part
and poll part. Using DMA to get the DMA part data and poll mode to
get the poll part.
2 to prevent user from processing these 2 parts above, kernel
buffers would be untouchable. User application only need send its data
buffer address to driver instead of query the kernel buffer.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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In the origin code, ASRC driver use cyclic way to process DMA task
transfering data to/from ASRC input/output FIFO. In this case, it is
necessary that user application should promise that the input buffer
flow is continuous. If not, there would be 0 data be inserted into data
flow. The output data would be noisy.
In this patch,
1 use scatter list instead of cyclic SDMA: with scatter list,
SDMA would stop when the applied scatter list nents are finished.
2 set stall bit for ASRC "memory->ASRC->memory" convert to stop
ASRC convert when input data is not send into ASRC input FIFO in time.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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For ASRC's "memory -> ASRC -> memory" using, new driver would support
model below: user input one buffer into ASRC and an corresponding output
buffer would be poped out. There is no timing requirement between this
input buffer and next input buffer. Thus driver would not use the cyclic
way to config SDMA and scatterlist is used. buffer allocated by
dma_alloc_coherent() can't support scatterlist well.
In this patch, use kzalloc to allocate buffer to support scatterlist.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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SDMA driver can't promise receive all output data generated. Cause when
the data in output FIFO is less than ASRC output FIFO watermark, there
would be no DMA request generated and thus no SDMA transfer would
happens.
In this patch, add work struct to support ASRC driver receive last part
of data in OUTPUT FIFO in polling way.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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According to ASRC memory->ASRC->memory requirement, driver should
satisfy the feature below: user application would passed into one buffer
and waiting until the output buffer is generated. In this case, only one
buffer is on processing and it is no necessary to use the queue to do
the convert. What is worse, queue operation would make the ASRC driver
hard to understand and maintain.
In this patch, remove the queue operation in ASRC driver.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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There was a mpr121_touchkey.c driver already upstream,
the orignall driver by 2.6.35 kernel development
should be removed to avoid duplicate.
This reverts commit 3d6df22ad54a14bc8cebb7753c36f7b3cd811665.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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In the maxim 17135 driver, the power good is confirmed by the
power good GPIO polarity change when comparing the status at
the beginning of driver probe and display regulator enabled.
However, it is not reliable since the initial value of the GPIO
is not constant. Normally, it is 1 but it can be 0 after system reset
unexpectedly. Now, it is changed to POK bit checking in FAULT register.
Signed-off-by: Jack Lee <jack.lee@freescale.com>
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- Added mxcfb_elcdif_register_mode function.
- Create video mode list, and check default video mode
with video mode list before setting.
- Adjust elcdif pixel clock setting, reconfig elcdif pixel
parent clock video pll, get more accurate pixel clock
according video mode.
- Added video mode dump function for debug
Signed-off-by: Sandor Yu <R01008@freescale.com>
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IC designer had clarified that 1P1 can be turned off if we do not need support
remote wakeup. So If there is no requirement for USB remote wake up, the 1P1
can be turn off. USB driver will support dynamically turn on(off) 1P1 during
system suspend. 1P1 will be turn on depend on USB wakeup is enabled.
add platform_1p1_on platform data in head file.
Signed-off-by: make shi <b15407@freescale.com>
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Adding Atkinson's dithering alorism implementation into our EPDC
Driver with Y8->Y1 and Y8->Y4 supported. Two EPDC flags have been
added to support the features. EPDC_FLAG_USE_DITHERING_Y1 and
EPDC_FLAG_USE_DITHERING_Y4.
Signed-off-by: Daiyu Ko <dko@freescale.com>
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When unplug, blank happens, HDMI audio can't play properly. So in
driver, audio pcm would be disconnected when event above happens.
However, pulse audio can't process disconnect event properly and if an
blank or unplug event happens, HDMI sink would lost and can't be back
again.
In this patch, instead of disconnecting audio PCM stream, triggering
stop audio pcm while unplug and blank, triggering start again while plug
and unblank if the audio pcm is triggerd stop in the unplug/blank event.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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Add battery driver support for mx6sl_evk.
Signed-off-by: Rong Dian <b38775@freescale.com>
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New NAND controllers can perform read/write via HW engines which don't expose
OOB data in their DMA mode. To reflect this, we should rework the nand_chip /
nand_ecc_ctrl interfaces that assume that drivers will always read/write OOB
data in the nand_chip.oob_poi buffer. A better interface includes a boolean
argument that explicitly tells the callee when OOB data is requested by the
calling layer (for reading/writing to/from nand_chip.oob_poi).
This patch adds the 'oob_required' parameter to each relevant {read,write}_page
interface; all 'oob_required' parameters are left unused for now. The next
patch will set the parameter properly in the nand_base.c callers, and follow-up
patches will make use of 'oob_required' in some of the callee functions.
Note that currently, there is no harm in ignoring the 'oob_required' parameter
and *always* utilizing nand_chip.oob_poi, but there can be
performance/complexity/design benefits from avoiding filling oob_poi in the
common case. I will try to implement this for some drivers which can be ported
easily.
Note: I couldn't compile-test all of these easily, as some had ARCH
dependencies.
[Huang Shijie: I remove the unused code for the other drivers.]
[dwmw2: Merge later 1/0 vs. true/false cleanup]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Shmulik Ladkani <shmulik.ladkani@gmail.com>
Acked-by: Jiandong Zheng <jdzheng@broadcom.com>
Acked-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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In this patch, add support for:
1. Interface for HDMI audio to register PCM into HDMI core driver.
2. Interface for HDMI video driver to stop HDMI audio
3. Interface for HDMI video driver to inform the state of HDMI cable and
state of HDMI blank.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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Test Env:
1. MX6DL SabreSD board.
2. On board eMMC (Sandisk: SDIN5C2-8G) running at 8-bit DDR @ 52MHz.
3. Test commands:
3.1 Writing command:
# dd if=/dev/zero of=/dev/mmcblk0 bs=1M count=100 conv=fsync
3.2 Reading command:
# echo 1 > /proc/sys/vm/drop_caches
# echo 1 > /proc/sys/vm/drop_caches
# sleep 1
# dd if=/dev/mmcblk0 of=/dev/null bs=1M count=100
Performance result with this patch:
-------------------------------------------------------
| CPU freq | SDMA (512KB) | SDMA (64KB) | ADMA |
|----------+--------------+-------------+-------------|
| 1Ghz | ~11MB/s (w) | ~5MB/s (w) | ~11MB/s (w) |
| | ~25MB/s (r) | ~25MB/s (r) | ~23MB/s (r) |
|----------+--------------+-------------+-------------|
| 200Mhz | ~8MB/s (w) | ~5MB/s (w) | ~9MB/s (w) |
| | ~16MB/s (r) | ~20MB/s (r) | ~13MB/s (r) |
-------------------------------------------------------
Performance result without this patch:
-------------------------------------------------------
| CPU freq | SDMA (512KB) | SDMA (64KB) | ADMA |
|----------+--------------+-------------+-------------|
| 1Ghz | ~10MB/s (w) | ~5MB/s (w) | ~10MB/s (w) |
| | ~22MB/s (r) | ~23MB/s (r) | ~22MB/s (r) |
|----------+--------------+-------------+-------------|
| 200Mhz | ~8MB/s (w) | ~4MB/s (w) | ~8MB/s (w) |
| | ~13MB/s (r) | ~16MB/s (r) | ~11MB/s (r) |
-------------------------------------------------------
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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It is used to sync pdata->lowpower between wakeup interrupt
and driver API.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Add CPU governor trigger for GPU2D and GPUVG core, without these trigger
some benchmark show performance drop when enable CPU governor
Signed-off-by: Richard Liu <r66033@freescale.com>
Acked-by: Lily Zhang
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In RIGEL TO1.1, the same HDMI_SDMA fix is introduced as ARIK TO1.2. Add
support for RIGEL TO1.1 for HDMI_SDMA functionality.
In this patch:
1.Add hdmi_SDMA_check() interface to judge whether MX6 chip
support HDMI_SDMA.
2.Replace mx6q_version() check with hdmi_SDMA_check() to support
both ARIK To1.2 and RIGEL TO1.1.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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In the origin code, ESAI driver supoprt audio p2p playback by setting
input PCM data's sample rate thought amixer interface.It is ugly and
request user application call amixer control interface everytime before
and playback.
In this patch, user can call the audio p2p playback by writing data to
an special virtual device. Driver would automatically get the params of
input PCM. At the same time, driver would get the output sample rate and
word data. With the data abover, driver can set ASRC properly and audio
p2p palyback is support.
This patch mainly focus on:
1 clean old p2p playback way for ESAI.
2 Setup the output sample rate and word width to virtual
device's substream_runtime's private data. Everytime the virtual
device is called, the data abover is used for config ASRC, ESAI,
and codec.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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Define IPU_PIX_FMT_YUV444P macro for non-interleaved YUV444 pixel format
Signed-off-by: Wayne Zou <b36644@freescale.com>
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include/linux head file part
- After USB driver prime a bulk transfer(whatever IN or OUT, take
OUT for example) on ep1, only one dTD is primed, an USB Interrupt
(bit 0 of USBSTS) will be issued, and find that endptcomplete
register is 0x2 which means an OUT transfer on ep1 is completed,
at this time the ep1 out queue head status is 0x1e18000, and next
dtd pointer is 0x1 which means transfer is done and everything is
OK, while the dTD token status is 0x2008080 which means this dTD
is still active, not completed yet.
- Audio SDMA and Ethernet have the similar issue
- root cause is not found yet
- work around:
change the non-cacheable bufferable memory to non-cacheable
non-bufferable memory to make this issue disappear.
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
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add a function to check the end address including reserved memory,
this API can provide the top address of phy memory,
it can be used to check if the phy memory is valild in some driver
like VPU.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
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in mx6q/dl, move fsl tuning procedure into platform driver code from common
code hacking.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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Add the AHCI platform suspend/resume function callback to
fix this issue.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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add get_supplier_property interface.
This patch was written by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
originally.
Signed-off-by: Rong Dian <b38775@freescale.com>
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The origin ASRC driver did not support input and output wordwidth
config but an total wordwidth config instead. And the input wordwith
and output wordwidth are all fixed to 24 bit.
In this path, we do things below:
1 Update to use input wordwidth and output wordwidth config seperately
instead of an total wordwidth config.
2 Set corresponding DMA(input/output) buswidth according ASRC's input
and output wordwidth config.
3 Support 16/24 bit input wordwidth and 24 bit output wordwidth.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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It is used to usb charger detect, the charger detection process need
to access anatop register.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Add Sipix driver for electronic paper dispaly
- Support RGB565 & Y4 formats with 800x600 resolution
- Support synchronization update by waiting the last
request update completed.
- Support automated update using Linux deferred io mechanism
- Support for panning(y-direction)
- Support rotation with 90,180,and 270 degree.
- Initial integration with ePXP, output Y4 format
- Support specific waveform modes update.
- Support Snapshot, Queue and Queue Merge update sheeme.
- Support full and partial EPD screen updates.
mode_1 & mode_2: partial update
mode_0 & mode_3: full update
- Align waveform mode with EPDC as below:
mode_init = mode_0;
mode_gc4 = mode_2;
mode_A2 = mode_4, mode_du =mode_4;
mode_gc8 = mode_1, mode_gc16 = mode_1, mode_gc32 = mode_1;
Signed-off-by: Fugang Duan <B38611@freescale.com>
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dual camera support for mx6q and mx6dl:
1. let mipi and parallel camera working on different csi
2. the two camera can work independently and synchronously
3. the two camera will be registered and different video
device(/dev/video0, /dev/video1)
4. when both camera are working, the can not use the same
ipu channel, that is, when camera one using PRP_ENC_MEM
or PRP_VF_MEM channel, the other one can only use CSI_MEM
this is the driver part.
Signed-off-by: Wu Guoxing <b39297@freescale.com>
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- use new console lock/unlock
Board Rework Needed:
- remove R572, R569, R611 to eliminate conflict with FEC modules.
Signed-off-by: Robby Cai <R63905@freescale.com>
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It is cause by HDMI audio driver can't get right pixel clock
from IPU driver if pixel clock source from HSP clock not from
DI clock.
HDMI driver get pixel clock by call clk_get_rate() function,
but the function return actually clock, in some videomode the
actually pixel clock is not right equal the pixel clock in CEA spec.
Get pixel clock from video mode struct instead of CCM register.
480P HDMI audio can work.
Signed-off-by: Sandor Yu <R01008@freescale.com>
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- Add Y4 output format for SPDC.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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1.change the battery driver's name to sabresd_battery.c ,it
means this driver is only special for sabersd boards.
2.fix battery charger function bugs and improve driver code.
Signed-off-by: Rong Dian <b38775@freescale.com>
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Add battery charger driver on SABRESD_rev.B board.
Signed-off-by: Rong Dian <b38775@freescale.com>
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This patch includes some of the clk enable/disable changes from rev2
Check the version of the HDMI IP to determine whether the fifo
threshold needs to be high. The i.Mx6dl version of the HDMI doesn't
need the workaround. All other parts of the workaround are used
for both parts for code simplicity.
----------------------------------------------------------
For i.Mxq, set the Threshold of audio fifo as: FIFO depth - 2 (fixed
and independent of the number of channels actually used).
Use unspecified length ahb bursts (using fixed INCRx will make the
audio dma fail).
Additionally and in order to get it working on all conditions it will
be necessary to run the following sw steps at startup of video and audio
(or when video changes or audio changes):
1-Configure AUD_N1 and AUD_CTS1 registers with final value and let the
AUD_N2, AUD_N3, AUD_CTS2 and AUD_CTS3 to 0s.
2-Configure start and end addresses of audio DMA registers.
3-Start DMA operation
4-Configure the AUD_CTS2 and AUD_CTS3 with the final value.
5-Configure the AUD_N2 and AUD_N3 with final value.
Signed-off-by: Alan Tull <r80115@freescale.com>
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VPU needs 4K align buffer address for tiled format data output.
Use this macro for IPU/V4L2/Apps to calculate the frame/field size.
Signed-off-by: Wayne Zou <b36644@freescale.com>
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Add a platform data to indicate whether the board support ONFI nand
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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Basic I2C module integration of AMFM module to ARD platform IMX6Q
and IMX6DL rev A and rev B boards. Supported for kernel 3.0.15.
Signed-off-by: Alejandro Sierra <b18039@freescale.com>
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Add tiled format macros: IPU_PIX_FMT_TILED_NV12 and
IPU_PIX_FMT_TILED_NV12F
Signed-off-by: Wayne Zou <b36644@freescale.com>
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Delete unused variable busy_lock in mxc_asrc.h.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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1. add amic and dmic support.
2. update wm8962 codec driver
Signed-off-by: Gary Zhang <b13634@freescale.com>
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We observed a few commands timeout when using auto cmd23.
The root cause is still unkonwn.
This patch is a workaround to not use auto cmd23 temporarily.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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1 close clock when asrc is not working.
2 enable the asrc core clock when user sucessfully request an
ASRC pair and disable it when the pair is release.So the call
from ESAI using the p2p DMA mode can be support.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
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Add irq count to CPUFreq as a freq change condition.
Because some devices' working mode is unable to issue
CPUFreq change because of low CPU loading, but the cpu
freq will impact these devices' performace significantly.
Interactive govervor will sample the cpu loading as well
as the irq count which is registered. If the
loading or the irq count exceed the threshold we set,
governor will issue an CPUFreq change request.
These devices' irq threshold and enable/disable can be modified
via /sys/devices/system/cpu/cpufreq/interactive/irq_scaling
echo 0xAABBBC to change the default setting as below
AA : irq number
BBB: threshold
C :enable or disable
Currently only enable USDHC3, USDHC4, GPU, SATA and
USB by default, we can add device to the init struct which is
located in arch/arm/mach-mx6/irq.c.
Signed-off-by: Anson Huang <b20788@freescale.com>
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cpufreq: interactive: New 'interactive' governor
This governor is designed for latency-sensitive workloads, such as
interactive user interfaces. The interactive governor aims to be
significantly more responsive to ramp CPU quickly up when CPU-intensive
activity begins.
Existing governors sample CPU load at a particular rate, typically
every X ms. This can lead to under-powering UI threads for the period of
time during which the user begins interacting with a previously-idle system
until the next sample period happens.
The 'interactive' governor uses a different approach. Instead of sampling
the CPU at a specified rate, the governor will check whether to scale the
CPU frequency up soon after coming out of idle. When the CPU comes out of
idle, a timer is configured to fire within 1-2 ticks. If the CPU is very
busy from exiting idle to when the timer fires then we assume the CPU is
underpowered and ramp to MAX speed.
If the CPU was not sufficiently busy to immediately ramp to MAX speed, then
the governor evaluates the CPU load since the last speed adjustment,
choosing the highest value between that longer-term load or the short-term
load since idle exit to determine the CPU speed to ramp to.
A realtime thread is used for scaling up, giving the remaining tasks the
CPU performance benefit, unlike existing governors which are more likely to
schedule rampup work to occur after your performance starved tasks have
completed.
The tuneables for this governor are:
/sys/devices/system/cpu/cpufreq/interactive/min_sample_time:
The minimum amount of time to spend at the current frequency before
ramping down. This is to ensure that the governor has seen enough
historic CPU load data to determine the appropriate workload.
/sys/devices/system/cpu/cpufreq/interactive/go_maxspeed_load
The CPU load at which to ramp to max speed.
Signed-off-by: Anson Huang <b20788@freescale.com>
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