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2012-09-12ENGR00212251-2: sai: add SAI driver support for FaradayAlison Wang
Add SAI driver support for Faraday. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Xiaochun Li <b41219@freescale.com>
2012-03-06ENGR00170526-4 ESAI: To resolve the playback no sound issue occasionally happenLionel Xu
There is no sound output any longer sometimes after several times of playback, this platch is trying to resolve this issue by: 1)move the global power control bit setting from function hw_params/shutdown to DAPM, thererfor the PWN bit will not be set/unset each time playback; 2) Signed-off-by: Lionel Xu <Lionel.Xu@freescale.com>
2012-03-06ENGR00170526-3 ESAI: Remove the workaround to reset codec before playbackingLionel Xu
Previously in order to avoid audio playback no sound issue, a hardware reset was made to the codec chip each time when doing playback. now remove this workaround. Signed-off-by: Lionel Xu <Lionel.Xu@freescale.com>
2012-02-28ENGR00175219-4 wm8958: add audio codec supportGary Zhang
add two channels record support. Signed-off-by: Gary Zhang <b13634@freescale.com>
2012-02-28ENGR00175219-3 wm8958: add audio codec supportGary Zhang
add wm8958 audio codec support Signed-off-by: Gary Zhang <b13634@freescale.com>
2012-02-21ENGR00171079-4 cs42888 imx6q-sabreauto supportted ratesAdrian Alonso
* Get audio codec platform data and overwrite supportted sample rates if defined in machine board file. * Remove machine soc specific sample rate settings. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
2012-02-17ENGR00173964 make hdmi audio init dependent on hdmi video initAlan Tull
Don't show hdmi as an audio playback device if hdmi isn't configured on the command line. Signed-off-by: Alan Tull <r80115@freescale.com>
2012-02-08ENGR00172342-2 EDID parse audio data blocksAlan Tull
Add functionality to parse Audio Data Blocks from EDID data to find out what modes of LPCM are suppored by the HDMI sink device. The parsed settings are saved in the hdmi mfd. The HDMI audio driver will check the settings when the audio stream is opened and will then apply appropriate constraints. If we are unable to read from the EDID, then we default to supporting Basic Audio as defined by the HDMI specification (stereo, 16 bit, 32KHz, 44.1KHz, 48KHz PCM). Signed-off-by: Alan Tull <r80115@freescale.com>
2012-02-07ENGR00173869-9: i.mx6dl: add the misc drivers supportJason Liu
This patch change is very trivial and simply just add cpu_is_mx6dl() or using cpu_is_mx6 to replace cpu_is_mx6q each driver owner will check it and adjust it accordingly later, such as sdhc etc. Signed-off-by: Jason Liu <r64343@freescale.com>
2012-01-09ENGR00171026 SGTL5000: remove mono supportGary Zhang
there is a issue on 24bit mono transmit of sgtl5000, temporarily disable mono support Signed-off-by: Gary Zhang <b13634@freescale.com>
2012-01-09ENGR00170999 Fix the record end, playback muteb02247
SGTL5000_VAG_POWERUP used by record and playback. when playback and record are opened, close one of them will cause the other mute Signed-off-by: b02247 <b02247@freescale.com>
2012-01-09ENGR00162649 sgtl5000: reduce the DAC volumeGary Zhang
1. if the DAC volume is largest, output is harsh. so reduce the DAC volume. 2. increase ADC volume Signed-off-by: Gary Zhang <b13634@freescale.com>
2012-01-09fix the building warningsJason Liu
Signed-off-by: Jason Liu <r64343@freescale.com>
2012-01-09ENGR00162729 MX6 ESAI: To reset the codec before initing a stream playbackingLionel Xu
Sometimes there is no sound after starting a stream playbacking, this problem can be resolved by resetting external codec at the beginning of startup. Signed-off-by: Lionel Xu <R63889@freescale.com>
2012-01-09ENGR00162035 Fix usage of snd_soc_update_bits() func in SGTL5000 driverMahesh Mahadevan
Some calls to the snd_soc_update_bits() uses an incorrect value for the mask field Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
2012-01-09ENGR00161288 balance spdif clock enables and disablesAlan Tull
Add tx_active, rx_active flags to keep track of what channels have enabled clocks. In suspend/resume, only disable/re-enable the clocks that were enabled. Signed-off-by: Alan Tull <alan.tull@freescale.com>
2012-01-09ENGR00160860-2 hdmi audio driverAlan Tull
Audio driver for i.Mx built-in HDMI Transmitter. * Uses HDMI Transmitter's built-in DMA. * Adds IEC958-style digital audio header info to the raw audio. * Gets pixel clock from the IPU driver and calculates clock regenerator values (cts and N). * Move ipu_id, and disp_id from the HDMI's platform data to the HDMI mfd's platform data. Saves them in the hdmi mfd. * Add mfd functionality to update the clock regenerator values when the hdmi changes the pixel clock rate or when requested from the audio driver with a new audio sample rate. Signed-off-by: Alan Tull <alan.tull@freescale.com>
2012-01-09ENGR00139265-2 mxc alsa soc spdif driverAlan Tull
* Add spdif block clock divider settings and spdif_clk_set_rate function to mxc_spdif_platform_data. Signed-off-by: Alan Tull <alan.tull@freescale.com>
2012-01-09ENGR00139265-1 spdif capture gets clock from spdif streamAlan Tull
The S/PDIF block's DPLL recovers the clock from the input bitstream. So S/PDIF capture rate is not dependent on transmit clocks available. Signed-off-by: Alan Tull <alan.tull@freescale.com>
2012-01-09ENGR00156745 MX6Q ESAI: Playback and record can't start up concurrentlyLionel Xu
Proper flag setting and placement should be used to avoid function hw_param called multiple times when playback and record startup concurrently. Signed-off-by: Lionel Xu <Lionel.Xu@freescale.com>
2012-01-09SAUCE: set correct rates before registering SPDIF codec DAIEric Miao
BugLink: http://bugs.launchpad.net/bugs/855281 Playback/capture rates should be configured before the SPDIF codec DAI is registered, according to the parameters that passed in by the platform data. And this caused pulseaudio not working with the SPDIF sound card. Signed-off-by: Eric Miao <eric.miao@linaro.org>
2012-01-09ENGR00156813 MX53 ALSA: Recording no soundLionel Xu
There is no sound in the recorded wav, to enable recording, the VAG should be powered up, and the mic bias resistor should be setup with proper value. Signed-off-by: Lionel Xu <Lionel.Xu@freescale.com>
2012-01-09ENGR00139255-2 MX6Q_BSP ESAI: Add esai recording supportLionel Xu
Add ESAI recording to mx6q platform. Note: since there is pad conflict between esai record and fec, add a boot argument esai_record to deal with it. This argument is required to enable the record functionality. Signed-off-by: Lionel Xu <R63889@freescale.com>
2012-01-09ENGR00154650-2 ESAI: add mx53 playback/record supportGary Zhang
add driver codes for mx53 ard. close esai clk when not used. add delay when power on cs42888 to avoid noise Signed-off-by: Gary Zhang <b13634@freescale.com>
2012-01-09ENGR00154727 ESAI: Resolve i2c access problem when there is no audio cardLionel Xu
I2c device should not probe successfully when there is no such device on the bus. This will make i2c access failure later. Signed-off-by: Lionel Xu <R63889@freescale.com>
2012-01-09ENGR00153793-1 ESAI: Resolve esai codec i2c suspend/resume problemLionel Xu
1)Resolve esai codec i2c suspend/resume problem; 2)Remove imx pcm operating function which already defined in imx-ssi.c Signed-off-by: Lionel Xu <R63889@freescale.com>
2012-01-09ENGR00153651-2 ESAI: Add esai/cs42888 audio codec support on mx6q platformLionel Xu
Add ESAI and related audio codec cs42888 support on mx6q platform. Signed-off-by: Lionel Xu <R63889@freescale.com>
2012-01-09ENGR00139461-2 mxc alsa soc spdif driverAlan Tull
S/PDIF tx and rx using ASoC layer. Signed-off-by: Alan Tull <alan.tull@freescale.com>
2012-01-09ENGR00141647 AUDIO,SGTL5000: Fix codec error after resetZeng Zhaoming
sgtl5000 codec not work after board reset, this is caused by sgtl5000 using register address step is 2, and snd-soc-core can't handle this as we expect, so we have to fill the register cache by reading register out when initialization instead of providing a default value array. Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
2012-01-09ENGR00141217-8 ASoC: SGTL5000: Add DAP support for sgtl5000 codecFrank Li
upgrade to 2.6.38 kernel Add Digital Audio Process(DAP) for sgtl5000 codec Audio: imx53,loco,audio: make Loco sgtl5000 codec work config audmux when ssi probed, and fix sdma watermark settings Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
2011-12-09ASoC: Ensure WM8731 register cache is synced when resuming from disabledMark Brown
commit ed3e80c4c991a52f9fce3421536a78e331ae0949 upstream. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-12-09ASoC: wm8753: Skip noop reconfiguration of DAI modeTimo Juhani Lindfors
commit 2391a0e06789a3f1718dee30b282562f7ed28c87 upstream. This patch makes it possible to set DAI mode to its currently applied value even if codec is active. This is necessary to allow aplay -t raw -r 44100 -f S16_LE -c 2 < /dev/urandom & alsactl store -f backup.state alsactl restore -f backup.state to work without returning errors. This patch is based on a patch sent by Klaus Kurzmann <mok@fluxnetz.de>. Signed-off-by: Timo Juhani Lindfors <timo.lindfors@iki.fi> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-11-21ASoC: Don't use wm8994->control_data in wm8994_readable_register()Mark Brown
commit 8eeea521d9d0fa6afd62df8c6e6566ee946117fa upstream. The field is no longer initialised so this will crash if running on wm8958. Reported-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-11-11ASoC: Ensure the WM8962 oscillator and PLLs start up disabledMark Brown
commit 2af8de8c39cf58e5a5e40a9d5d71332da98e6ba7 upstream. Since there is no current software control for these they would otherwise be left enabled, consuming power. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-11-11ASoC: Ensure WM8962 PLL registers are resetMark Brown
commit 4f4488abc97c1c27ff029f887944e6a6da1f5733 upstream. The WM8962 has a separate software reset for the PLL registers. Ensure that these are reset also on startup. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-11-11ASoC: WM8904: Set `invert' bit for Capture SwitchHong Xu
commit 5a7c5f26df3c0122814dfa1c13ef6dfbdbffdb86 upstream. Set `invert' bit for Capture Switch. Otherwise analogue is muted when Capture Switch is ON. Signed-off-by: Hong Xu <hong.xu@atmel.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-11-11ASoC: Leave input audio data bit length settings untouched in wm8711_set_dai_fmtAxel Lin
commit d558cfc30064a97c2c65dbd2b3a4f5a1dea7ec1b upstream. Current implementation in wm8711_set_dai_fmt always clear BIT[3:2] (the Input Audio Data Bit Length Select) of WM8711_IFACE(07h) register. Input Audio Data Bit Length Select bits are set by wm8711_hw_params, we should leave BIT[3:2] untouched in wm8711_set_dai_fmt. Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-11-11ASoC: wm8711: Fix wrong mask for setting input audio data bit length selectAxel Lin
commit 04c57163c8edfbc50e022737014069998ba4fc5f upstream. The Input Audio Data Bit Length Select is controlled by BIT[3:2] of WM8711_IFACE(07h) register. Current code incorrectly masks BIT[1:0] which is for Audio Data Format Select. Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-11-11ASoC: Fix a bug in WM8962 DSP_A and DSP_B settingsSusan Gao
commit fbc7c62a3ff831aef24894b7982cd1adb2b7e070 upstream. Signed-off-by: Susan Gao <sgao@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmico.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-11-11ASoC: Remove direct register cache accesses from WM8962 driverMark Brown
commit 38f3f31a0a797bdbcc0cdb12553bbecc2f9a91c4 upstream. Also fix return values for speaker switch updates. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-11-11ASoC: wm8994: Use SND_SOC_DAPM_AIF_OUT for AIF3 CaptureAxel Lin
commit 35024f4922f7b271e7529673413889aa3d51c5fc upstream. Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Liam Girdwood <lrg@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-11-11ASoC: ak4535: fixup cache register tableAxel Lin
commit 7c04241acbdaf97f1448dcccd27ea0fcd1a57684 upstream. ak4535_reg should be 8bit, but cache table is defined as 16bit. Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-11-11ASoC: ak4642: fixup cache register tableKuninori Morimoto
commit 19b115e523208a926813751aac8934cf3fc6085e upstream. ak4642 register was 8bit, but cache table was defined as 16bit. ak4642 doesn't work correctry without this patch. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-11-11ASoC: wm8741: Fix setting interface format for DSP modesAxel Lin
commit 3a340104fad6ecbea5ad6792a2ea855f0507a6e0 upstream. According to the datasheet: Format Control (05h) BITS[3:2] FMT[1:0] Audio data format selection 00 = right justified mode 01 = left justified mode 10 = I2S mode 11 = DSP mode BIT[4] LRP Polarity selec for LRCLK/DSP mode select 0 = normal LRCLK poalrity/DSP mode A 1 = inverted LRCLK poarity/DSP mode B For SND_SOC_DAIFMT_DSP_A, we should set 0x000C instead of 0x0003. For SND_SOC_DAIFMT_DSP_B, we should set 0x001C instead of 0x0013. Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Liam Girdwood <lrg@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-11-11ASoC: wm8940: Properly set codec->dapm.bias_levelAxel Lin
commit 5927f94700e860ae27ff24e7f3bc9e4f7b9922eb upstream. Reported-by: Chris Paulson-Ellis <chris@edesix.com> Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-10-16ASoC: Fix setting update bits for WM8753_LADC and WM8753_RADCAxel Lin
commit 21d17dd2a377ba894f26989915eb3c6e427a3656 upstream. Current code set update bits for WM8753_LDAC and WM8753_RDAC twice, but missed setting update bits for WM8753_LADC and WM8753_RADC. I think it is a copy-paste bug in commit 776065 "ASoC: codecs: wm8753: Fix register cache incoherency". Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-10-03ASoC: ssm2602: Re-enable oscillator after suspendLars-Peter Clausen
commit 9058020cd9ae3423d6fe7de591698dc96b6701aa upstream. Currently the the internal oscillator is powered down when entering BIAS_OFF state, but not re-enabled when going back to BIAS_STANDBY. As a result the CODEC will stop working after suspend if the internal oscillator is used to generate the sysclock signal. This patch fixes it by clearing the appropriate bit in the power down register when the CODEC is re-enabled. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-10-03ASoC: ad193x: fix dac word len settingScott Jiang
commit 95c93d8525ebce1024bda7316f602ae45c36cd6f upstream. dac word len value should left shift before setting Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Acked-by: Barry Song <21cnbao@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-10-03ASoC: ad193x: fix registers definitionScott Jiang
commit bf545ed72f2eeac664695a8ea2199d9ddaef6020 upstream. fix dac word len mask and adc tdm fmt shift value Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-15ASoC: sgtl5000: fix cache handlingWolfram Sang
commit 151798f872d6b386d82cd1707ad703e981fef8f2 upstream. Cache handling in this driver is broken. The chip has 16-bit registers, yet the register numbers also increase by 2 per register, i.e. there are only even-numbered registers. The cache in this driver, though, simply increments register numbers, so it does need some mapping as seen in sgtl5000_restore_regs(), note the '>> 1': snd_soc_write(codec, SGTL5000_CHIP_LINREG_CTRL, cache[SGTL5000_CHIP_LINREG_CTRL >> 1]); That, of course, won't work with snd_soc_update_bits(). (Thus, we won't even notice the missing register 0x1c in the default regs which shifted all follwing registers to wrong values.) Noticed on the MX28EVK where enabling the regulators simply locked up the chip. Refactor the routines and use a properly sized default_regs array which matches the register layout of the underlying chip, i.e. create a truly flat cache. This also saves some code which should make up for the bigger array a little. When soc-core will somewhen have another cache type which handles a step size, this conversion will also ease the transition. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Tested-by: Dong Aisheng <b29396@freescale.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Liam Girdwood <lrg@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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