From 64f877bd9e15ef00c7441e7ad45bc6cedb40c528 Mon Sep 17 00:00:00 2001 From: Seshendra Gadagottu Date: Wed, 20 Jul 2011 17:04:38 +0530 Subject: arm: tegra: cardhu: Add support for hsic baseband power management Added required Cardu specific changes for hsic baseband xmm modem power management. BUG 828389 Change-Id: I119f541544cd34e1584608826714d2bfd9cbfe34 Reviewed-on: http://git-master/r/40789 Reviewed-by: Varun Colbert Tested-by: Varun Colbert --- arch/arm/mach-tegra/board-cardhu-pinmux.c | 7 ++- arch/arm/mach-tegra/board-cardhu.c | 83 +++++++++++++++++++++++++------ arch/arm/mach-tegra/board-cardhu.h | 16 ++++++ 3 files changed, 89 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-tegra/board-cardhu-pinmux.c b/arch/arm/mach-tegra/board-cardhu-pinmux.c index 779876e8318d..f00e04fea0eb 100644 --- a/arch/arm/mach-tegra/board-cardhu-pinmux.c +++ b/arch/arm/mach-tegra/board-cardhu-pinmux.c @@ -273,7 +273,7 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux_common[] = { DEFAULT_PINMUX(GPIO_PU2, RSVD1, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(GPIO_PU3, RSVD1, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(GPIO_PU4, PWM1, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(GPIO_PU5, PWM2, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(GPIO_PU5, PWM2, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(GPIO_PU6, RSVD1, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(DAP4_FS, I2S3, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(DAP4_DIN, I2S3, NORMAL, NORMAL, INPUT), @@ -283,6 +283,11 @@ static __initdata struct tegra_pingroup_config cardhu_pinmux_common[] = { DEFAULT_PINMUX(CLK3_REQ, DEV3, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(GMI_WP_N, GMI, NORMAL, NORMAL, INPUT), + DEFAULT_PINMUX(KB_ROW5, OWR, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW12, MIO, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW14, MIO, NORMAL, NORMAL, OUTPUT), + DEFAULT_PINMUX(KB_ROW15, MIO, NORMAL, NORMAL, OUTPUT), + #if 0 /* for testing on Verbier */ DEFAULT_PINMUX(GMI_WAIT, NAND, NORMAL, NORMAL, INPUT), DEFAULT_PINMUX(GMI_ADV_N, NAND, NORMAL, NORMAL, OUTPUT), diff --git a/arch/arm/mach-tegra/board-cardhu.c b/arch/arm/mach-tegra/board-cardhu.c index a3f4473e33b4..6c56f309a323 100644 --- a/arch/arm/mach-tegra/board-cardhu.c +++ b/arch/arm/mach-tegra/board-cardhu.c @@ -60,6 +60,7 @@ #include "devices.h" #include "gpio-names.h" #include "fuse.h" +#include "baseband-xmm-power.h" static unsigned long ramconsole_start; static unsigned long ramconsole_size; @@ -695,6 +696,22 @@ static struct platform_device *cardhu_devices[] __initdata = { }; +static struct tegra_uhsic_config uhsic_phy_config = { + .enable_gpio = EN_HSIC_GPIO, + .reset_gpio = -1, + .sync_start_delay = 9, + .idle_wait_delay = 17, + .term_range_adj = 0, + .elastic_underrun_limit = 16, + .elastic_overrun_limit = 16, +}; + +static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = { + .phy_type = TEGRA_USB_PHY_TYPE_HSIC, + .phy_config = &uhsic_phy_config, + .operating_mode = TEGRA_USB_HOST, + .power_down_on_bus_suspend = 1, +}; static struct tegra_ehci_platform_data tegra_ehci_pdata[] = { [0] = { @@ -783,18 +800,6 @@ static struct usb_phy_plat_data tegra_usb_phy_pdata[] = { }, }; -static struct tegra_ulpi_config uhsic_phy_config = { - .enable_gpio = EN_HSIC_GPIO, - .reset_gpio = -1, -}; - -static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = { - .phy_type = TEGRA_USB_PHY_TYPE_HSIC, - .phy_config = &uhsic_phy_config, - .operating_mode = TEGRA_USB_HOST, - .power_down_on_bus_suspend = 1, -}; - static struct tegra_otg_platform_data tegra_otg_pdata = { .host_register = &tegra_usb_otg_host_register, .host_unregister = &tegra_usb_otg_host_unregister, @@ -808,22 +813,28 @@ static void cardhu_usb_init(void) tegra_get_board_info(&bi); - tegra_usb_phy_init(tegra_usb_phy_pdata, ARRAY_SIZE(tegra_usb_phy_pdata)); + tegra_usb_phy_init(tegra_usb_phy_pdata, + ARRAY_SIZE(tegra_usb_phy_pdata)); tegra_otg_device.dev.platform_data = &tegra_otg_pdata; platform_device_register(&tegra_otg_device); - if (bi.board_id == BOARD_PM267) { uhsic_phy_config.reset_gpio = PM267_SMSC4640_HSIC_HUB_RESET_GPIO; tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata; + platform_device_register(&tegra_ehci2_device); } else if ((bi.board_id == BOARD_PM269) || - (bi.board_id == BOARD_E1186) || (bi.board_id == BOARD_E1256)) { + (bi.board_id == BOARD_E1256)) { tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata; + platform_device_register(&tegra_ehci2_device); + } else if ((bi.board_id == BOARD_E1186) || + (bi.board_id == BOARD_E1197)) { + tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata; + /* baseband registartion happens in baseband-xmm-power */ } else { tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1]; + platform_device_register(&tegra_ehci2_device); } - platform_device_register(&tegra_ehci2_device); tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2]; platform_device_register(&tegra_ehci3_device); @@ -853,6 +864,29 @@ static void cardhu_gps_init(void) tegra_gpio_enable(TEGRA_GPIO_PU3); } +static struct baseband_power_platform_data tegra_baseband_power_data = { + .baseband_type = BASEBAND_XMM, + .modem = { + .xmm = { + .bb_rst = XMM_GPIO_BB_RST, + .bb_on = XMM_GPIO_BB_ON, + .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE, + .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE, + .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE, + .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ, + .hsic_device = &tegra_ehci2_device, + }, + }, +}; + +static struct platform_device tegra_baseband_power_device = { + .name = "baseband_xmm_power", + .id = -1, + .dev = { + .platform_data = &tegra_baseband_power_data, + }, +}; + static void cardhu_modem_init(void) { struct board_info board_info; @@ -874,9 +908,26 @@ static void cardhu_modem_init(void) else gpio_direction_input(w_disable_gpio); break; + case BOARD_E1186: + case BOARD_E1197: + tegra_gpio_enable( + tegra_baseband_power_data.modem.xmm.bb_rst); + tegra_gpio_enable( + tegra_baseband_power_data.modem.xmm.bb_on); + tegra_gpio_enable( + tegra_baseband_power_data.modem.xmm.ipc_bb_wake); + tegra_gpio_enable( + tegra_baseband_power_data.modem.xmm.ipc_ap_wake); + tegra_gpio_enable( + tegra_baseband_power_data.modem.xmm.ipc_hsic_active); + tegra_gpio_enable( + tegra_baseband_power_data.modem.xmm.ipc_hsic_sus_req); + platform_device_register(&tegra_baseband_power_device); + break; default: break; } + } #ifdef CONFIG_SATA_AHCI_TEGRA diff --git a/arch/arm/mach-tegra/board-cardhu.h b/arch/arm/mach-tegra/board-cardhu.h index d5c2b803a3d2..910b0cbc8410 100644 --- a/arch/arm/mach-tegra/board-cardhu.h +++ b/arch/arm/mach-tegra/board-cardhu.h @@ -28,6 +28,7 @@ /* Processor Board ID */ #define BOARD_E1187 0x0B57 #define BOARD_E1186 0x0B56 +#define BOARD_E1197 0x0B61 #define BOARD_E1198 0x0B62 #define BOARD_E1256 0x0C38 #define BOARD_E1291 0x0C5B @@ -176,4 +177,19 @@ int cardhu_pmon_init(void); #define TOUCH_GPIO_RST_ATMEL_T9 TEGRA_GPIO_PH6 #define TOUCH_BUS_ATMEL_T9 1 +/* Baseband GPIO addresses */ +#define BB_GPIO_BB_EN TEGRA_GPIO_PR5 +#define BB_GPIO_BB_RST TEGRA_GPIO_PS4 +#define BB_GPIO_SPI_INT TEGRA_GPIO_PS6 +#define BB_GPIO_SPI_SS TEGRA_GPIO_PV0 +#define BB_GPIO_AWR TEGRA_GPIO_PS7 +#define BB_GPIO_CWR TEGRA_GPIO_PU5 + +#define XMM_GPIO_BB_ON BB_GPIO_BB_EN +#define XMM_GPIO_BB_RST BB_GPIO_BB_RST +#define XMM_GPIO_IPC_HSIC_ACTIVE BB_GPIO_SPI_INT +#define XMM_GPIO_IPC_HSIC_SUS_REQ BB_GPIO_SPI_SS +#define XMM_GPIO_IPC_BB_WAKE BB_GPIO_AWR +#define XMM_GPIO_IPC_AP_WAKE BB_GPIO_CWR + #endif -- cgit v1.2.3