From a2fa26f5eb0d70aac3a6df1c37d72499ea270cde Mon Sep 17 00:00:00 2001 From: Nitin Garg Date: Tue, 6 Mar 2012 14:58:00 -0600 Subject: ENGR00175607: Divide by zero error while resuming from suspend The dvfs_core stop is not clearing the cpufreq_trig_needed flag due to which during resuming the system, dvfs_core_handler is calling dvfs_cpu_jiffies with current cpu rate as 0 when FSVAI_FREQ_NOCHANGE condition occurs. Signed-off-by: Nitin Garg --- arch/arm/mach-mx5/board-mx50_rdp.c | 2 +- arch/arm/mach-mx5/clock.c | 4 ---- arch/arm/mach-mx5/clock_mx50.c | 4 ---- arch/arm/mach-mx5/cpu_op-mx53.c | 9 --------- arch/arm/plat-mxc/cpufreq.c | 8 -------- arch/arm/plat-mxc/dvfs_core.c | 6 ++++-- 6 files changed, 5 insertions(+), 28 deletions(-) diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-mx5/board-mx50_rdp.c index 151b72ba0497..e7cb19c93c05 100644 --- a/arch/arm/mach-mx5/board-mx50_rdp.c +++ b/arch/arm/mach-mx5/board-mx50_rdp.c @@ -748,7 +748,7 @@ static iomux_v3_cfg_t mx50_gpmi_nand[] __initdata = { MX50_PIN_SD3_WP__NANDF_RESETN, }; -static int gpmi_nfc_platform_init(void) +static int __init gpmi_nfc_platform_init(void) { return mxc_iomux_v3_setup_multiple_pads(mx50_gpmi_nand, ARRAY_SIZE(mx50_gpmi_nand)); diff --git a/arch/arm/mach-mx5/clock.c b/arch/arm/mach-mx5/clock.c index 08e44a75dfa1..e662c3ed6669 100644 --- a/arch/arm/mach-mx5/clock.c +++ b/arch/arm/mach-mx5/clock.c @@ -103,7 +103,6 @@ extern int dvfs_core_is_active; extern int mxc_jtag_enabled; extern int uart_at_24; -extern int cpufreq_trig_needed; extern int low_bus_freq_mode; static int cpu_clk_set_op(int op); @@ -5266,8 +5265,5 @@ static int cpu_clk_set_op(int op) cpu_curr_op = op; } -#if defined(CONFIG_CPU_FREQ) - cpufreq_trig_needed = 1; -#endif return 0; } diff --git a/arch/arm/mach-mx5/clock_mx50.c b/arch/arm/mach-mx5/clock_mx50.c index aa0e6b4ed2b5..e9bfa180485a 100644 --- a/arch/arm/mach-mx5/clock_mx50.c +++ b/arch/arm/mach-mx5/clock_mx50.c @@ -112,7 +112,6 @@ void __iomem *databahn; extern int mxc_jtag_enabled; extern int uart_at_24; -extern int cpufreq_trig_needed; extern int low_bus_freq_mode; extern int med_bus_freq_mode; @@ -3599,8 +3598,5 @@ static int cpu_clk_set_op(int wp) __raw_writel(reg, MXC_CCM_CACRR); cpu_curr_op = wp; -#if defined(CONFIG_CPU_FREQ) - cpufreq_trig_needed = 1; -#endif return 0; } diff --git a/arch/arm/mach-mx5/cpu_op-mx53.c b/arch/arm/mach-mx5/cpu_op-mx53.c index 2ec5433b7e26..8de811d1b19d 100644 --- a/arch/arm/mach-mx5/cpu_op-mx53.c +++ b/arch/arm/mach-mx5/cpu_op-mx53.c @@ -116,15 +116,6 @@ static struct cpu_op cpu_op_ces_1_2g[] = { .mfn = 1, .cpu_podf = 0, .cpu_voltage = 1300000,}, - { - .pll_rate = 1000000000, - .cpu_rate = 1000000000, - .pdf = 0, - .mfi = 10, - .mfd = 11, - .mfn = 5, - .cpu_podf = 0, - .cpu_voltage = 1250000,}, { .pll_rate = 800000000, .cpu_rate = 800000000, diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c index e3c19c539439..636d6a953889 100644 --- a/arch/arm/plat-mxc/cpufreq.c +++ b/arch/arm/plat-mxc/cpufreq.c @@ -178,19 +178,11 @@ static int mxc_set_target(struct cpufreq_policy *policy, static int mxc_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t state) { - pre_suspend_rate = clk_get_rate(cpu_clk); - /* Set to max freq and voltage */ - if (pre_suspend_rate != (imx_freq_table[0].frequency * 1000)) - set_cpu_freq(imx_freq_table[0].frequency); - return 0; } static int mxc_cpufreq_resume(struct cpufreq_policy *policy) { - if (clk_get_rate(cpu_clk) != pre_suspend_rate) - set_cpu_freq(pre_suspend_rate); - return 0; } diff --git a/arch/arm/plat-mxc/dvfs_core.c b/arch/arm/plat-mxc/dvfs_core.c index 52cfc5686194..288bcc4c6118 100644 --- a/arch/arm/plat-mxc/dvfs_core.c +++ b/arch/arm/plat-mxc/dvfs_core.c @@ -84,7 +84,7 @@ #define CCM_CDCR_ARM_FREQ_SHIFT_DIVIDER 0x4 #define CCM_CDHIPR_ARM_PODF_BUSY 0x10000 -int cpufreq_trig_needed; +static int cpufreq_trig_needed; int dvfs_core_is_active; static struct mxc_dvfs_platform_data *dvfs_data; static struct device *dvfs_dev; @@ -259,6 +259,7 @@ static int mx5_set_cpu_freq(int op) udelay(10); spin_unlock_irqrestore(&mxc_dvfs_core_lock, flags); + clk_set_rate(cpu_clk, rate); if (rate < org_cpu_rate) { ret = regulator_set_voltage(cpu_regulator, gp_volt, gp_volt); @@ -273,7 +274,6 @@ static int mx5_set_cpu_freq(int op) reg = __raw_readl(ccm_base + dvfs_data->ccm_cdcr_offset); reg &= ~(CCM_CDCR_SW_DVFS_EN); reg |= en_sw_dvfs; - clk_set_rate(cpu_clk, rate); } else { podf = cpu_op_tbl[op].cpu_podf; gp_volt = cpu_op_tbl[op].cpu_voltage; @@ -786,6 +786,8 @@ void stop_dvfs(void) for (cpu = 0; cpu < num_online_cpus(); cpu++) cpufreq_get(cpu); #endif + if (cpufreq_trig_needed == 1) + cpufreq_trig_needed = 0; } spin_lock_irqsave(&mxc_dvfs_core_lock, flags); -- cgit v1.2.3