From ac103ec7fc310aeccec5fa5d396d06020638d83a Mon Sep 17 00:00:00 2001 From: Sanchayan Maity Date: Mon, 19 Jun 2017 17:56:56 +0530 Subject: ARM: dts: imx6dl-colibri-aster: add support for Aster with Colibri iMX6 Add support for Aster Carrier Board with Colibri iMX6. Signed-off-by: Sanchayan Maity Acked-by: Marcel Ziswiler --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6dl-colibri-aster.dts | 198 +++++++++++++++++++++++++++++ 2 files changed, 199 insertions(+) create mode 100644 arch/arm/boot/dts/imx6dl-colibri-aster.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 98fe5f259d92..acad3c973103 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -256,6 +256,7 @@ dtb-$(CONFIG_SOC_IMX53) += \ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6dl-aristainetos_4.dtb \ imx6dl-aristainetos_7.dtb \ + imx6dl-colibri-aster.dtb \ imx6dl-colibri-cam-eval-v3.dtb \ imx6dl-colibri-eval-v3.dtb \ imx6dl-cubox-i.dtb \ diff --git a/arch/arm/boot/dts/imx6dl-colibri-aster.dts b/arch/arm/boot/dts/imx6dl-colibri-aster.dts new file mode 100644 index 000000000000..b17c089a3120 --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-colibri-aster.dts @@ -0,0 +1,198 @@ +/* + * Copyright 2014-2017 Toradex AG + * Copyright 2012 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; + +#include +#include +#include "imx6dl.dtsi" +#include "imx6qdl-colibri.dtsi" + +/ { + model = "Toradex Colibri iMX6DL/S on Colibri Aster Board"; + compatible = "toradex,colibri_imx6dl-aster", "toradex,colibri_imx6dl", "fsl,imx6dl"; + + aliases { + i2c1 = &i2c2; + i2c2 = &i2c3; + }; + + aliases { + rtc0 = &rtc_i2c; + rtc1 = "/soc/aips-bus@02000000/snvs@020cc000/snvs-rtc-lp@34"; + }; + + aliases { + /* the following, together with kernel patches, forces a fixed assignment + between device id and usdhc controller */ + /* i.e. the eMMC on usdhc3 will be /dev/mmcblk0 */ + mmc0 = &usdhc3; /* eMMC */ + mmc1 = &usdhc1; /* MMC 4bit slot */ + }; + + extcon_usbc_det: usbc_det { + compatible = "linux,extcon-usb-gpio"; + debounce = <25>; + id-gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbc_det_1>; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_keys>; + + wakeup { + label = "Wake-Up"; + gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; + linux,code = ; + debounce-interval = <10>; + gpio-key,wakeup; + }; + }; + + regulators { + reg_usb_host_vbus: usb_host_vbus { + status = "okay"; + }; + }; +}; + +&backlight { +#if 0 /* PWM polarity: if 1 is brightest */ + pwms = <&pwm3 0 5000000 0>; +#else /* PWM polarity: if 0 is brightest */ + pwms = <&pwm3 0 5000000 1>; +#endif + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + status = "okay"; +}; + +&ecspi4 { + fsl,spi-num-chipselects = <2>; + cs-gpios = < + &gpio5 2 GPIO_ACTIVE_HIGH + &gpio5 4 GPIO_ACTIVE_HIGH + >; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi4 &pinctrl_spi_cs1 &pinctrl_csi_gpio_2>; + status = "okay"; + + spidev0: spidev@0 { + compatible = "toradex,evalspi"; + reg = <0>; + spi-max-frequency = <23000000>; + }; + + spidev1: spidev@1 { + compatible = "toradex,evalspi"; + reg = <1>; + spi-max-frequency = <23000000>; + }; +}; + +/* + * I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier + * board) + */ +&i2c3 { + status = "okay"; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + compatible = "st,m41t0"; + reg = <0x68>; + }; +}; + +&iomuxc { + /* + * Mux all pins which are unused to be GPIOs + * so they are ready for export to user space + */ + pinctrl-names = "default"; + pinctrl-0 = < + &pinctrl_weim_gpio_1 &pinctrl_weim_gpio_2 + &pinctrl_weim_gpio_3 &pinctrl_weim_gpio_4 + &pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6 + &pinctrl_csi_gpio_1 + &pinctrl_gpio_1 + &pinctrl_gpio_2 + &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1 + >; + + gpio { + pinctrl_gpios: gpios { + fsl,pins = < + MX6QDL_PAD_GPIO_9__GPIO1_IO09 PAD_CTRL_HYS_PU /* SODIMM 28 */ + MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 PAD_CTRL_HYS_PU /* SODIMM 30 */ + >; + }; + }; +}; + +&lcd { + status = "okay"; +}; + +&mxcfb1 { + status = "okay"; +}; + +&mxcfb2 { + status = "okay"; +}; + +&pwm1 { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&pwm3 { + status = "okay"; +}; + +&pwm4 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&usbh1 { + status = "okay"; +}; + +&usbotg { + status = "okay"; + extcon = <&extcon_usbc_det>; +}; + +/* MMC */ +&usdhc1 { + status = "okay"; +}; -- cgit v1.2.3