From e6cf8fd5610dc4fafe38c156ba3d2478e4f78ed8 Mon Sep 17 00:00:00 2001 From: Philippe Schenker Date: Mon, 17 Jun 2019 16:53:51 +0200 Subject: ARM: dts (ds): imx6ull*colibri*: Merge changes from 4.9-2.3.x-imx-next In 4.14 devicetress are based on the mainline DT's and only necessary stuff for downstream is put into those devicetrees. This commit holds the changes for imx6ull*colibri* from 4.9. Signed-off-by: Philippe Schenker --- arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 156 ++++++++++++++++++++++--- arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi | 18 --- arch/arm/boot/dts/imx6ull-colibri.dtsi | 76 +++++++++++- 3 files changed, 216 insertions(+), 34 deletions(-) diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi index cc92baea8250..b290b497cad2 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi @@ -28,16 +28,12 @@ clock-frequency = <16000000>; }; - panel: panel { - compatible = "edt,et057090dhu"; - backlight = <&bl>; - power-supply = <®_3v3>; - - port { - panel_in: endpoint { - remote-endpoint = <&lcdif_out>; - }; - }; + extcon_usbc_det: usbc_det { + compatible = "linux,extcon-usb-gpio"; + debounce = <25>; + id-gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_snvs_usbc_det>; }; reg_3v3: regulator-3v3 { @@ -78,6 +74,10 @@ status = "okay"; }; +&pxp { + status = "okay"; +}; + &ecspi1 { status = "okay"; @@ -94,6 +94,13 @@ xceiver-supply = <®_5v0>; status = "okay"; }; + + spidev0: spidev@0 { + compatible = "toradex,evalspi"; + reg = <0>; + spi-max-frequency = <23000000>; + status = "disabled"; + }; }; &flexcan1 { @@ -147,11 +154,119 @@ }; &lcdif { + display = <&display0>; status = "okay"; - port { - lcdif_out: endpoint { - remote-endpoint = <&panel_in>; + display0: lcd-display { + bits-per-pixel = <16>; + bus-width = <18>; + + display-timings { + native-mode = <&timing_vga>; + + /* Standard VGA timing */ + timing_vga: 640x480 { + clock-frequency = <25175000>; + hactive = <640>; + vactive = <480>; + hback-porch = <40>; + hfront-porch = <24>; + vback-porch = <32>; + vfront-porch = <11>; + hsync-len = <96>; + vsync-len = <2>; + + de-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + pixelclk-active = <0>; + }; + + /* WVGA Timing, e.g. EDT ET070080DH6 */ + timing_wvga: 800x480 { + clock-frequency = <33260000>; + hactive = <800>; + vactive = <480>; + hback-porch = <216>; + hfront-porch = <40>; + vback-porch = <35>; + vfront-porch = <10>; + hsync-len = <128>; + vsync-len = <2>; + + de-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + pixelclk-active = <0>; + }; + /* WVGA Timing, TouchRevolution Fusion 7" */ + timing_wvga2: 800x480pixclkact { + clock-frequency = <33260000>; + hactive = <800>; + vactive = <480>; + hback-porch = <216>; + hfront-porch = <40>; + vback-porch = <35>; + vfront-porch = <10>; + hsync-len = <128>; + vsync-len = <2>; + + de-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + pixelclk-active = <1>; + }; + /* Standard SVGA timing */ + timing_svga: 800x600 { + clock-frequency = <40000000>; + hactive = <800>; + vactive = <600>; + hback-porch = <88>; + hfront-porch = <40>; + vback-porch = <23>; + vfront-porch = <1>; + hsync-len = <128>; + vsync-len = <4>; + + de-active = <1>; + hsync-active = <1>; + vsync-active = <1>; + pixelclk-active = <0>; + }; + /* TouchRevolution Fusion 10"/CLAA101NC05 10.1 inch */ + timing_wsvga: 1024x600 { + clock-frequency = <48000000>; + hactive = <1024>; + vactive = <600>; + hback-porch = <104>; + hfront-porch = <43>; + vback-porch = <24>; + vfront-porch = <20>; + hsync-len = <5>; + vsync-len = <5>; + + de-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + pixelclk-active = <0>; + }; + /* Standard XGA timing */ + timing_xga: 1024x768 { + clock-frequency = <65000000>; + hactive = <1024>; + vactive = <768>; + hback-porch = <160>; + hfront-porch = <24>; + vback-porch = <29>; + vfront-porch = <3>; + hsync-len = <136>; + vsync-len = <6>; + + de-active = <1>; + hsync-active = <0>; + vsync-active = <0>; + pixelclk-active = <0>; + }; }; }; }; @@ -189,6 +304,8 @@ }; &usbotg1 { + extcon = <&extcon_usbc_det &extcon_usbc_det>; + vbus-supply = <®_usbh_vbus>; status = "okay"; }; @@ -197,7 +314,20 @@ status = "okay"; }; +/* The define SD_1_8 allows to use the SD interface at a higher speed mode + * if the card supports it. For this the signaling voltage is switched from + * 3.3V to 1.8V under the usdhc1's drivers control. + */ +/* #define SD_1_8 */ &usdhc1 { +#ifdef SD_1_8 + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_cd_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_cd_usdhc1>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_snvs_cd_usdhc1>; + pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_cd_usdhc1_sleep>; + vqmmc-supply = <®_sd1_vmmc>; +#else pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; no-1-8-v; diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi index 4274794c1d0d..a8abfe73a529 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi @@ -19,24 +19,6 @@ }; }; -&cpu0 { - clock-frequency = <792000000>; - operating-points = < - /* kHz uV */ - 792000 1225000 - 528000 1175000 - 396000 1025000 - 198000 950000 - >; - fsl,soc-operating-points = < - /* KHz uV */ - 792000 1175000 - 528000 1175000 - 396000 1175000 - 198000 1175000 - >; -}; - &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index 958782943860..2fc8634cd05e 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -11,6 +11,29 @@ ethernet1 = &fec1; }; + memory { + reg = <0x80000000 0x10000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x08000000>; + linux,cma-default; + }; + }; + + cpus { + cpu0: cpu@0 { + dc-supply = <®_soc_in>; + }; + }; + bl: backlight { compatible = "pwm-backlight"; pinctrl-names = "default"; @@ -19,6 +42,12 @@ status = "disabled"; }; + pxp_v4l2_out { + compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", \ + "fsl,imx6sl-pxp-v4l2"; + status = "okay"; + }; + reg_module_3v3: regulator-module-3v3 { compatible = "regulator-fixed"; regulator-always-on; @@ -47,6 +76,26 @@ states = <1800000 0x1 3300000 0x0>; vin-supply = <®_module_3v3>; }; + + reg_soc_in: regulator-soc-in { + compatible = "regulator-fixed"; + regulator-min-microvolt = <1275000>; + regulator-max-microvolt = <1275000>; + regulator-name = "soc_in"; + regulator-type = "voltage"; + vin-supply = <®_module_3v3>; + }; + + reg_eth_phy: regulator-eth-phy { + compatible = "regulator-fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "eth_phy"; + regulator-type = "voltage"; + vin-supply = <®_module_3v3>; + clocks = <&clks IMX6UL_CLK_ENET2_REF_125M>; + startup-delay-us = <150000>; + }; }; &adc1 { @@ -67,6 +116,7 @@ pinctrl-1 = <&pinctrl_enet2_sleep>; phy-mode = "rmii"; phy-handle = <ðphy1>; + phy-supply = <®_eth_phy>; status = "okay"; mdio { @@ -81,6 +131,14 @@ }; }; +&gpc { + fsl,cpu_pupscr_sw2iso = <0x1>; + fsl,cpu_pupscr_sw = <0x0>; + fsl,cpu_pdnscr_iso2sw = <0x1>; + fsl,cpu_pdnscr_iso = <0x1>; + fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */ +}; + &gpmi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpmi_nand>; @@ -156,6 +214,10 @@ #pwm-cells = <3>; }; +&pxp { + status = "okay"; +}; + &sdma { status = "okay"; }; @@ -167,14 +229,14 @@ &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>; - uart-has-rtscts; + fsl,uart-has-rtscts; fsl,dte-mode; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; - uart-has-rtscts; + fsl,uart-has-rtscts; fsl,dte-mode; }; @@ -208,6 +270,7 @@ }; &iomuxc { + imx6ull-colibri { pinctrl_can_int: canint-grp { fsl,pins = < MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0X14 /* SODIMM 73 */ @@ -523,7 +586,7 @@ MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17059 MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17059 - MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x14 + MX6UL_PAD_GPIO1_IO03__REF_CLK_32K 0x14 >; }; @@ -532,6 +595,7 @@ MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 >; }; + }; /* imx6ull { */ }; &iomuxc_snvs { @@ -587,6 +651,12 @@ >; }; + pinctrl_snvs_cd_usdhc1_sleep: snvs-usdhc1-cd-grp-slp { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0 + >; + }; + pinctrl_snvs_wifi_pdn: snvs-wifi-pdn-grp { fsl,pins = < MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x14 -- cgit v1.2.3