From 78b02c36e43cd34a9d830507929ae77b074e6d0a Mon Sep 17 00:00:00 2001 From: Franklin S Cooper Jr Date: Tue, 25 Jul 2017 21:15:51 -0500 Subject: ARM: dts: am437xx: Enable NAND dma prefetch by default Currently the default method of prefetch polled shows the highest possible read and write speed when minimal non NAND background activity is being done. But it is also very CPU intensive to reach these high speeds (CPU load of 99% via mtd performance tests). While DMA prefetch only uses 50% of the CPU to achieve around 23% less in top read and write performance. However, as the non NAND CPU load increases the read and write performance takes a large hit when using polled prefetch. Therefore, prefetch dma mode ends up outperforming prefetch polled in general "system level" test. So switch to using dma prefetch by default since it is likely what most users would prefer. Signed-off-by: Franklin S Cooper Jr Acked-by: Roger Quadros Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am43x-epos-evm.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts/am43x-epos-evm.dts') diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts index 54f40f370011..9d276af7c539 100644 --- a/arch/arm/boot/dts/am43x-epos-evm.dts +++ b/arch/arm/boot/dts/am43x-epos-evm.dts @@ -564,6 +564,7 @@ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ <1 IRQ_TYPE_NONE>; /* termcount */ rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ + ti,nand-xfer-type = "prefetch-dma"; ti,nand-ecc-opt = "bch16"; ti,elm-id = <&elm>; nand-bus-width = <8>; -- cgit v1.2.3