From a9ce1afb35317d2a0646c7530f0ae9822c93cd69 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 6 Oct 2014 11:37:56 +0200 Subject: ARM: mvebu: Fix the Aurora L2 cache node with the required cache-unified property The L2 cache controller on the Armada 370 and Armada XP SoCs is a unified cache. Moreover, the Aurora cache controller is compatible with the L2x0 cache controller: the "cache-unified" property is required by its binding. This patch fixes the Aurora L2 cache node for the Armada 370 and Armada XP SoCs by adding this property. Reported-by: Sebastian Hesselbarth Signed-off-by: Gregory CLEMENT Acked-by: Sebastian Hesselbarth Link: https://lkml.kernel.org/r/1412588276-4514-1-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts/armada-xp.dtsi') diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index bff9f6c18db1..e1707133ee18 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -39,6 +39,7 @@ compatible = "marvell,aurora-system-cache"; reg = <0x08000 0x1000>; cache-id-part = <0x100>; + cache-unified; wt-override; }; -- cgit v1.2.3 From b324fa60ac94b9c00c59f621743715c036d134fa Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Fri, 19 Sep 2014 21:07:09 +0200 Subject: ARM: mvebu: armada-xp: Consolidate pinctrl node All current Armada XP SoCs have their pin controller at 0x18000/0x38. Move the common properties of pinctrl nodes to armada-xp.dtsi to allow to share pinctrl settings later. Signed-off-by: Sebastian Hesselbarth Acked-by: Thomas Petazzoni Tested-By: Benoit Masson Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm/boot/dts/armada-xp.dtsi') diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index e1707133ee18..4010eee93df7 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -72,6 +72,16 @@ status = "disabled"; }; + pinctrl { + reg = <0x18000 0x38>; + + sdio_pins: sdio-pins { + marvell,pins = "mpp30", "mpp31", "mpp32", + "mpp33", "mpp34", "mpp35"; + marvell,function = "sd0"; + }; + }; + system-controller@18200 { compatible = "marvell,armada-370-xp-system-controller"; reg = <0x18200 0x500>; -- cgit v1.2.3 From 264a05e19bf50f93f1a377e16497a626ae9f931e Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Fri, 19 Sep 2014 21:12:00 +0200 Subject: ARM: mvebu: armada-xp: Add node alias to pinctrl and add base address In other MVEBU SoCs, the pin controller node is called pin-ctrl with its base address added. Also, we have a node alias to access the pinctrl node easily. Fix this for Armada XP pinctrl nodes to be consistent with other SoCs. Signed-off-by: Sebastian Hesselbarth Acked-by: Thomas Petazzoni Tested-By: Benoit Masson Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/armada-xp.dtsi') diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index 4010eee93df7..aea7feecd953 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -72,7 +72,7 @@ status = "disabled"; }; - pinctrl { + pinctrl: pin-ctrl@18000 { reg = <0x18000 0x38>; sdio_pins: sdio-pins { -- cgit v1.2.3 From e59451432d7e0f7953e29c15e70111dfdbecc145 Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Fri, 19 Sep 2014 21:24:34 +0200 Subject: ARM: mvebu: armada-xp: Move GE0/1 pinctrl settings for RGMII Pinctrl settings for GE0 and GE1 are not only usable on RD-AXPWiFiAP. Moreover, naming the RGMII settings pmx-ge{0,1} is not precise enough as there is also a GMII setting for GE0. Move the pinctrl sub-nodes to the common pinctrl node and rename them to pmx-ge{0,1}-rgmii. Signed-off-by: Sebastian Hesselbarth Tested-By: Benoit Masson Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'arch/arm/boot/dts/armada-xp.dtsi') diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index aea7feecd953..06f25e2e0dd8 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -75,6 +75,22 @@ pinctrl: pin-ctrl@18000 { reg = <0x18000 0x38>; + pmx_ge0_rgmii: pmx-ge0-rgmii { + marvell,pins = + "mpp0", "mpp1", "mpp2", "mpp3", + "mpp4", "mpp5", "mpp6", "mpp7", + "mpp8", "mpp9", "mpp10", "mpp11"; + marvell,function = "ge0"; + }; + + pmx_ge1_rgmii: pmx-ge1-rgmii { + marvell,pins = + "mpp12", "mpp13", "mpp14", "mpp15", + "mpp16", "mpp17", "mpp18", "mpp19", + "mpp20", "mpp21", "mpp22", "mpp23"; + marvell,function = "ge1"; + }; + sdio_pins: sdio-pins { marvell,pins = "mpp30", "mpp31", "mpp32", "mpp33", "mpp34", "mpp35"; -- cgit v1.2.3 From 7254f6c52b5da38c0a79ab953d34e556fe16942f Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Fri, 19 Sep 2014 21:27:55 +0200 Subject: ARM: mvebu: armada-xp: Add GE0 pinctrl settings for GMII There is a GMII setting for GE0, add it to the common pinctrl node. Signed-off-by: Sebastian Hesselbarth Tested-By: Benoit Masson Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm/boot/dts/armada-xp.dtsi') diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index 06f25e2e0dd8..a3919b644737 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -75,6 +75,17 @@ pinctrl: pin-ctrl@18000 { reg = <0x18000 0x38>; + pmx_ge0_gmii: pmx-ge0-gmii { + marvell,pins = + "mpp0", "mpp1", "mpp2", "mpp3", + "mpp4", "mpp5", "mpp6", "mpp7", + "mpp8", "mpp9", "mpp10", "mpp11", + "mpp12", "mpp13", "mpp14", "mpp15", + "mpp16", "mpp17", "mpp18", "mpp19", + "mpp20", "mpp21", "mpp22", "mpp23"; + marvell,function = "ge0"; + }; + pmx_ge0_rgmii: pmx-ge0-rgmii { marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", -- cgit v1.2.3 From 181d9b28cbc9ae10e1467e2d013033b672d91d4b Mon Sep 17 00:00:00 2001 From: Arnaud Ebalard Date: Sat, 22 Nov 2014 00:45:35 +0100 Subject: arm: mvebu: add uartX labels for Armada SoC serial nodes This patch adds uartX labels for Armada SoC serial nodes. This is a preliminary work to be able to easily reference the serial lines in Device Tree files. One expected use is when providing stdout-path property for barebox. Reviewed-by: Thomas Petazzoni Acked-by: Andrew Lunn Signed-off-by: Arnaud Ebalard Link: https://lkml.kernel.org/r/0683d1a823fe9b75849f3dafcf1cf6ee291cdca6.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts/armada-xp.dtsi') diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index a3919b644737..e4ba27ef109b 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -53,7 +53,7 @@ reg = <0x11100 0x100>; }; - serial@12200 { + uart2: serial@12200 { compatible = "snps,dw-apb-uart"; reg = <0x12200 0x100>; reg-shift = <2>; @@ -62,7 +62,8 @@ clocks = <&coreclk 0>; status = "disabled"; }; - serial@12300 { + + uart3: serial@12300 { compatible = "snps,dw-apb-uart"; reg = <0x12300 0x100>; reg-shift = <2>; -- cgit v1.2.3 From 4904a82a9399d037588162e6fb4b293fa6a37f7c Mon Sep 17 00:00:00 2001 From: Arnaud Ebalard Date: Sat, 22 Nov 2014 00:45:56 +0100 Subject: arm: mvebu: move Armada 370/XP pinctrl node definition armada-370-xp.dtsi What was done by Sebastian in 264a05e19bf5 ("ARM: mvebu: armada-xp: Add node alias to pinctrl and add base address") and 01c434225ee6 ("ARM: mvebu: armada-xp: Use pinctrl node alias") can also be done for Armada 370, i.e. - Rename Armada 370 pinctrl node to pin-ctrl with its address encoded - Add a node alias to access the pinctrl node easily. - use the newly available alias in existing Armada 370 .dts files We can even go a bit further by putting the pinctrl node definition in armada-370-xp.dtsi, with only its reg property defined. This allows us to then also use the newly defined node alias in armada-xp.dtsi, armada-370.dtsi. Suggested-by: Sebastian Hesselbarth Suggested-by: Andrew Lunn Acked-by: Andrew Lunn Signed-off-by: Arnaud Ebalard Link: https://lkml.kernel.org/r/b54eb45e5242728aace3ce8aef2eae4251f8dea3.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp.dtsi | 72 +++++++++++++++++++--------------------- 1 file changed, 35 insertions(+), 37 deletions(-) (limited to 'arch/arm/boot/dts/armada-xp.dtsi') diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index e4ba27ef109b..b59a83cf2f26 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -73,43 +73,6 @@ status = "disabled"; }; - pinctrl: pin-ctrl@18000 { - reg = <0x18000 0x38>; - - pmx_ge0_gmii: pmx-ge0-gmii { - marvell,pins = - "mpp0", "mpp1", "mpp2", "mpp3", - "mpp4", "mpp5", "mpp6", "mpp7", - "mpp8", "mpp9", "mpp10", "mpp11", - "mpp12", "mpp13", "mpp14", "mpp15", - "mpp16", "mpp17", "mpp18", "mpp19", - "mpp20", "mpp21", "mpp22", "mpp23"; - marvell,function = "ge0"; - }; - - pmx_ge0_rgmii: pmx-ge0-rgmii { - marvell,pins = - "mpp0", "mpp1", "mpp2", "mpp3", - "mpp4", "mpp5", "mpp6", "mpp7", - "mpp8", "mpp9", "mpp10", "mpp11"; - marvell,function = "ge0"; - }; - - pmx_ge1_rgmii: pmx-ge1-rgmii { - marvell,pins = - "mpp12", "mpp13", "mpp14", "mpp15", - "mpp16", "mpp17", "mpp18", "mpp19", - "mpp20", "mpp21", "mpp22", "mpp23"; - marvell,function = "ge1"; - }; - - sdio_pins: sdio-pins { - marvell,pins = "mpp30", "mpp31", "mpp32", - "mpp33", "mpp34", "mpp35"; - marvell,function = "sd0"; - }; - }; - system-controller@18200 { compatible = "marvell,armada-370-xp-system-controller"; reg = <0x18200 0x500>; @@ -238,3 +201,38 @@ }; }; }; + +&pinctrl { + pmx_ge0_gmii: pmx-ge0-gmii { + marvell,pins = + "mpp0", "mpp1", "mpp2", "mpp3", + "mpp4", "mpp5", "mpp6", "mpp7", + "mpp8", "mpp9", "mpp10", "mpp11", + "mpp12", "mpp13", "mpp14", "mpp15", + "mpp16", "mpp17", "mpp18", "mpp19", + "mpp20", "mpp21", "mpp22", "mpp23"; + marvell,function = "ge0"; + }; + + pmx_ge0_rgmii: pmx-ge0-rgmii { + marvell,pins = + "mpp0", "mpp1", "mpp2", "mpp3", + "mpp4", "mpp5", "mpp6", "mpp7", + "mpp8", "mpp9", "mpp10", "mpp11"; + marvell,function = "ge0"; + }; + + pmx_ge1_rgmii: pmx-ge1-rgmii { + marvell,pins = + "mpp12", "mpp13", "mpp14", "mpp15", + "mpp16", "mpp17", "mpp18", "mpp19", + "mpp20", "mpp21", "mpp22", "mpp23"; + marvell,function = "ge1"; + }; + + sdio_pins: sdio-pins { + marvell,pins = "mpp30", "mpp31", "mpp32", + "mpp33", "mpp34", "mpp35"; + marvell,function = "sd0"; + }; +}; -- cgit v1.2.3 From d352f41e87e7226692d1346bb97c603615eeb817 Mon Sep 17 00:00:00 2001 From: Arnaud Ebalard Date: Sat, 22 Nov 2014 00:46:28 +0100 Subject: arm: mvebu: define and use common Armada XP UART2/3 pinctrl settings This patch defines common Armada XP pinctrl settings for uart2 and uart3 interfaces (uart0 and uart1 rx/tx do not rely on MPP): uart2: MPP42-43 as default uart3: MPP44-45 as default Suggested-by: Andrew Lunn Acked-by: Andrew Lunn Signed-off-by: Arnaud Ebalard Link: https://lkml.kernel.org/r/fd51c080c7139a67ec01df8d797f1e88ce557796.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch/arm/boot/dts/armada-xp.dtsi') diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index b59a83cf2f26..7cefb9b6d27c 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -55,6 +55,8 @@ uart2: serial@12200 { compatible = "snps,dw-apb-uart"; + pinctrl-0 = <&uart2_pins>; + pinctrl-names = "default"; reg = <0x12200 0x100>; reg-shift = <2>; interrupts = <43>; @@ -65,6 +67,8 @@ uart3: serial@12300 { compatible = "snps,dw-apb-uart"; + pinctrl-0 = <&uart3_pins>; + pinctrl-names = "default"; reg = <0x12300 0x100>; reg-shift = <2>; interrupts = <44>; @@ -235,4 +239,14 @@ "mpp33", "mpp34", "mpp35"; marvell,function = "sd0"; }; + + uart2_pins: uart2-pins { + marvell,pins = "mpp42", "mpp43"; + marvell,function = "uart2"; + }; + + uart3_pins: uart3-pins { + marvell,pins = "mpp44", "mpp45"; + marvell,function = "uart3"; + }; }; -- cgit v1.2.3 From 547c653b64022618250ca9c7c30151927509ae98 Mon Sep 17 00:00:00 2001 From: Arnaud Ebalard Date: Sat, 22 Nov 2014 00:46:39 +0100 Subject: arm: mvebu: define and use common Armada XP SPI pinctrl setting This patch defines common Armada XP pinctrl settings in armada-xp.dtsi for the supported SPI interface (MPP36-39) and use it as default for Armada XP spi interface. That being done, it removes the now redundant definitions in armada-xp-axpwifiap.dts. Note: this patch has the potential to break out-of-tree users w/o specific pinctrl settings for their spi interfaces if the default above does not match their config (i.e. if they do not use CS0). Acked-by: Andrew Lunn Signed-off-by: Arnaud Ebalard Link: https://lkml.kernel.org/r/d404b7abd80ee5a0fd8e8d3586d33cd37740d589.1416613429.git.arno@natisbad.org Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm/boot/dts/armada-xp.dtsi') diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index 7cefb9b6d27c..bdb36a05c039 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -43,6 +43,11 @@ wt-override; }; + spi0: spi@10600 { + pinctrl-0 = <&spi0_pins>; + pinctrl-names = "default"; + }; + i2c0: i2c@11000 { compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; reg = <0x11000 0x100>; @@ -240,6 +245,12 @@ marvell,function = "sd0"; }; + spi0_pins: spi0-pins { + marvell,pins = "mpp36", "mpp37", + "mpp38", "mpp39"; + marvell,function = "spi"; + }; + uart2_pins: uart2-pins { marvell,pins = "mpp42", "mpp43"; marvell,function = "uart2"; -- cgit v1.2.3 From 70ee4e9d9f054e258480fd51c90cfc2b72be8b78 Mon Sep 17 00:00:00 2001 From: Arnaud Ebalard Date: Sat, 22 Nov 2014 17:23:30 +0100 Subject: arm: mvebu: normalize pinctrl entries for Armada SoCs There are currently 2 differents naming conventions used between the existing Armada SoC DT files for pinctrl entries (*_pin(s): *-pin(s) and pmx_*: pmx-*) with a vast majority of files using the former: $ grep _pin arch/arm/boot/dts/armada-*.dts* | wc -l 155 $ grep pmx arch/arm/boot/dts/armada-*.dts* | wc -l 13 In fact, only some Armada XP files are using the second variant. This patch normalizes those files (mainly ge0/1 entries) to use the first variant. Signed-off-by: Arnaud Ebalard Link: https://lkml.kernel.org/r/00114c3169e1d93259ff4150ed46ee36eae16b1e.1416670812.git.arno@natisbad.org Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot/dts/armada-xp.dtsi') diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index bdb36a05c039..a2a6451524dc 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -212,7 +212,7 @@ }; &pinctrl { - pmx_ge0_gmii: pmx-ge0-gmii { + ge0_gmii_pins: ge0-gmii-pins { marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", @@ -223,7 +223,7 @@ marvell,function = "ge0"; }; - pmx_ge0_rgmii: pmx-ge0-rgmii { + ge0_rgmii_pins: ge0-rgmii-pins { marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", @@ -231,7 +231,7 @@ marvell,function = "ge0"; }; - pmx_ge1_rgmii: pmx-ge1-rgmii { + ge1_rgmii_pins: ge1-rgmii-pins { marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16", "mpp17", "mpp18", "mpp19", -- cgit v1.2.3