From 9faa5960eef3204cae6637b530f5e23e53b5a9ef Mon Sep 17 00:00:00 2001 From: Hauke Mehrtens Date: Fri, 29 May 2015 23:39:47 +0200 Subject: ARM: BCM5301X: add NAND flash chip description This adds the NAND flash chip description for a standard chip found connected to this SoC. This makes use of generic Broadcom NAND driver with the iProc interface. Signed-off-by: Hauke Mehrtens Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi (limited to 'arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi') diff --git a/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi b/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi new file mode 100644 index 000000000000..d10781e36f54 --- /dev/null +++ b/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi @@ -0,0 +1,24 @@ +/* + * Broadcom BCM470X / BCM5301X Nand chip defaults. + * + * This should be included if the NAND controller is on chip select 0 + * and uses 8 bit ECC. + * + * Copyright (C) 2015 Hauke Mehrtens + * + * Licensed under the GNU/GPL. See COPYING for details. + */ + +/ { + nand@18028000 { + nandcs@0 { + compatible = "brcm,nandcs"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + nand-ecc-strength = <8>; + nand-ecc-step-size = <512>; + }; + }; +}; -- cgit v1.2.3