From 8be6a6d04ceae15de160ca4cbc0915baaee801e4 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Sun, 14 Sep 2014 00:47:22 +0900 Subject: ARM: dts: Set i2c7 clock at 400kHz for exynos based Peach boards The downstream ChromeOS 3.8 kernel sets the clock frequency for the I2C bus 7 at 400kHz. Do the same change in mainline. Suggested-by: Doug Anderson Signed-off-by: Javier Martinez Canillas Reviewed-by: Doug Anderson Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5800-peach-pi.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts/exynos5800-peach-pi.dts') diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index 17537f0ab44a..88b354452d2f 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -487,6 +487,7 @@ &hsi2c_7 { status = "okay"; + clock-frequency = <400000>; max98091: codec@10 { compatible = "maxim,max98091"; -- cgit v1.2.3