From af6ad88acbd66ddfe31066ebcf1e02f848ec406c Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Fri, 27 Feb 2015 06:08:51 +0900 Subject: ARM: dts: Mux XMMCnDATA[0] pad correctly for Exynos5420 boards The Exynos5420 SoC has 3 sets of 8 pads used as data lines for the 3 MMC/SD/SDIO slots. These needs to be muxed as SD_n_DATA instead of a GPIO or external interrupt to allow the MMC controller to communicate with the attached cards or SDIO devices. Which data lines needs to be muxed as SD_n_DATA depends on the bus width used for data transfer: * bus-width = <1> needs SD_n_DATA[0] * bus-width = <4> needs SD_n_DATA[0-3] * bus-width = <8> needs SD_n_DATA[0-7] The Exynos5250-pinctrl.dtsi file that defines the groups of pins has SD_n_DATA[0] muxed for both sdn_bus1 and sdn_bus4 so just one of them needs to be included in the device node's pinctrl property. But Exynos5420-pinctrl has a different definition and only includes SD_n_DATA[1-3] for sdn_bus4. So for a bus-width = <4>, both sdn_bus1 and sdn_bus4 have to be in the dev pinctrl to mux all the needed pads. It seems all Exynos5420 boards had just cargo cult the pinctrl lines assuming that sdn_bus4 also included SD_n_DATA[0] and it only works because the bootloader muxes the pads correctly. But that is not the case for the devices not used by the bootloader such as WiFi modules. Add sdn_bus1 too in the nodes pinctrl to not rely on the bootloader. Suggested-by: Doug Anderson Signed-off-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5800-peach-pi.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts/exynos5800-peach-pi.dts') diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index 06737c60d333..ca73fb2d2da5 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -649,7 +649,7 @@ samsung,dw-mshc-sdr-timing = <0 4>; samsung,dw-mshc-ddr-timing = <0 2>; pinctrl-names = "default"; - pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>; bus-width = <8>; }; @@ -663,7 +663,7 @@ samsung,dw-mshc-sdr-timing = <2 3>; samsung,dw-mshc-ddr-timing = <1 2>; pinctrl-names = "default"; - pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; bus-width = <4>; }; -- cgit v1.2.3