From 3c9a18fd97ea0d7a15207c404654de8a8ad0175d Mon Sep 17 00:00:00 2001 From: Fugang Duan Date: Tue, 18 Aug 2015 15:55:26 +0800 Subject: MLK-11374: ARM: dts: add NAND support for i.MX6UL ddr3 arm2 board Add GPMI NAND support for i.MX6UL 14x14 ddr3 arm2 board. Signed-off-by: Han Xu Signed-off-by: Fugang Duan --- .../boot/dts/imx6ul-14x14-ddr3-arm2-gpmi-weim.dts | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2-gpmi-weim.dts (limited to 'arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2-gpmi-weim.dts') diff --git a/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2-gpmi-weim.dts b/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2-gpmi-weim.dts new file mode 100644 index 000000000000..2e6b54495d05 --- /dev/null +++ b/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2-gpmi-weim.dts @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "imx6ul-14x14-ddr3-arm2.dts" + +/* + * solve pin conflict with NAND + * + * USDHC2_CD, SD2_RST_B, USDHC2_WP conflict with RAWNAND CE pins , also + * overwritten the conflict of SD2_RST_B with RAWNAND ALE in hog + * QSPI CLK, CE and DATA pins conflict with RAWNAND data pins and CE, CLE, RB, + * WP, DQS pin + * + */ +&iomuxc { + pinctrl-0 = <&pinctrl_hog>; +}; + +&qspi{ + status = "disabled"; +}; + +&gpmi{ + status = "okay"; +}; + +&usdhc2 { + status = "disabled"; +}; -- cgit v1.2.3