From 39c2bd782a2c50c51bced96ad3f2c97d4997d949 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 10 Sep 2014 16:28:02 +0200 Subject: ARM: dts: rockchip: add Cortex-A9 SPI controller nodes This adds basic spi nodes and pinctrl settings to the rk3066 and rk3188 devicetree files. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3xxx.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch/arm/boot/dts/rk3xxx.dtsi') diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index c873624af6aa..7bcd69855052 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -26,6 +26,8 @@ i2c2 = &i2c2; i2c3 = &i2c3; i2c4 = &i2c4; + spi0 = &spi0; + spi1 = &spi1; }; xin24m: oscillator { @@ -291,4 +293,26 @@ clock-names = "saradc", "apb_pclk"; status = "disabled"; }; + + spi0: spi@20070000 { + compatible = "rockchip,rk3066-spi"; + clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>; + clock-names = "spiclk", "apb_pclk"; + interrupts = ; + reg = <0x20070000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi1: spi@20074000 { + compatible = "rockchip,rk3066-spi"; + clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>; + clock-names = "spiclk", "apb_pclk"; + interrupts = ; + reg = <0x20074000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; -- cgit v1.2.3