From 23a2fab0379894ad859ef30c3dbf566b9d5a01f2 Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Wed, 26 Sep 2018 17:12:08 +0200 Subject: ARM: dts: imx6ull-colibri-aster: Follow pinctrl naming from mainline While at it, add the dtbs for Aster Carrier Board to the Makefile. Signed-off-by: Max Krummenacher --- arch/arm/boot/dts/Makefile | 2 ++ arch/arm/boot/dts/imx6ull-colibri-aster.dtsi | 12 ++++++------ arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 8 ++++---- arch/arm/boot/dts/imx6ull-colibri.dtsi | 2 +- 4 files changed, 13 insertions(+), 11 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 7d228dcaa9cf..d4f74fd28b51 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -597,7 +597,9 @@ dtb-$(CONFIG_SOC_IMX6ULL) += \ imx6ull-9x9-evk-btwifi.dtb \ imx6ull-9x9-evk-btwifi-oob.dtb \ imx6ull-9x9-evk-ldo.dtb \ + imx6ull-colibri-aster.dtb \ imx6ull-colibri-eval-v3.dtb \ + imx6ull-colibri-wifi-aster.dtb \ imx6ull-colibri-wifi-eval-v3.dtb \ imx6ulz-14x14-evk.dtb \ imx6ulz-14x14-evk-btwifi.dtb \ diff --git a/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi b/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi index ba69ef18e8a8..b6c34d53b2ff 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi @@ -54,7 +54,7 @@ reg_usbh_vbus: regulator-usbh-vbus { compatible = "regulator-fixed"; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh1_reg>; + pinctrl-0 = <&pinctrl_usbh_reg>; regulator-name = "VCC_USB[1-4]"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; @@ -297,14 +297,14 @@ &usdhc1 { #ifdef SD_1_8 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; - pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_cd_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_cd_usdhc1>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_snvs_cd_usdhc1>; - pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_cd_usdhc1_sleep>; + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_snvs_usdhc1_cd>; + pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd_sleep>; vqmmc-supply = <®_sd1_vmmc>; #else pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_cd_usdhc1>; + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; no-1-8-v; #endif cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi index 5b9c8a77899c..9e4ab529c0f5 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi @@ -322,10 +322,10 @@ &usdhc1 { #ifdef SD_1_8 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; - pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_cd_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_cd_usdhc1>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_snvs_cd_usdhc1>; - pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_cd_usdhc1_sleep>; + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_snvs_usdhc1_cd>; + pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd_sleep>; vqmmc-supply = <®_sd1_vmmc>; #else pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index 2fc8634cd05e..eaf940c52882 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -651,7 +651,7 @@ >; }; - pinctrl_snvs_cd_usdhc1_sleep: snvs-usdhc1-cd-grp-slp { + pinctrl_snvs_usdhc1_cd_sleep: snvs-usdhc1-cd-slp-grp { fsl,pins = < MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0 >; -- cgit v1.2.3