From a9d2ba1444b0af6c2d8534f0b306660ffc045bc6 Mon Sep 17 00:00:00 2001
From: Ian Wisbon <ian.wisbon@timesys.com>
Date: Thu, 10 Feb 2011 17:15:15 -0500
Subject: Linux 2.6.31 Release for Digi ConnectCore Wi-i.MX boards

---
 arch/arm/mach-mx37/devices.c | 51 +++++++++++++++++++++++++++-----------------
 1 file changed, 32 insertions(+), 19 deletions(-)

(limited to 'arch/arm/mach-mx37/devices.c')

diff --git a/arch/arm/mach-mx37/devices.c b/arch/arm/mach-mx37/devices.c
index e346899cb2cf..ce1f33112396 100644
--- a/arch/arm/mach-mx37/devices.c
+++ b/arch/arm/mach-mx37/devices.c
@@ -645,8 +645,8 @@ void __init mxc_init_tve(void)
  */
 static struct resource dvfs_core_resources[] = {
 	[0] = {
-	       .start = MXC_DVFS_CORE_BASE,
-	       .end = MXC_DVFS_CORE_BASE + 4 * SZ_16 - 1,
+	       .start = DVFSCORE_BASE_ADDR,
+	       .end = DVFSCORE_BASE_ADDR + 4 * SZ_16 - 1,
 	       .flags = IORESOURCE_MEM,
 	       },
 	[1] = {
@@ -661,15 +661,11 @@ struct mxc_dvfs_platform_data dvfs_core_data = {
 	.reg_id = "SW1",
 	.clk1_id = "cpu_clk",
 	.clk2_id = "gpc_dvfs_clk",
-	.gpc_cntr_reg_addr = MXC_GPC_CNTR,
-	.gpc_vcr_reg_addr = MXC_GPC_VCR,
-	.ccm_cdcr_reg_addr = MXC_CCM_CDCR,
-	.ccm_cacrr_reg_addr = MXC_CCM_CACRR,
-	.ccm_cdhipr_reg_addr = MXC_CCM_CDHIPR,
-	.dvfs_thrs_reg_addr = MXC_DVFSTHRS,
-	.dvfs_coun_reg_addr = MXC_DVFSCOUN,
-	.dvfs_emac_reg_addr = MXC_DVFSEMAC,
-	.dvfs_cntr_reg_addr = MXC_DVFSCNTR,
+	.gpc_cntr_offset = MXC_GPC_CNTR_OFFSET,
+	.gpc_vcr_offset = MXC_GPC_VCR_OFFSET,
+	.ccm_cdcr_offset = MXC_CCM_CDCR_OFFSET,
+	.ccm_cacrr_offset = MXC_CCM_CACRR_OFFSET,
+	.ccm_cdhipr_offset = MXC_CCM_CDHIPR_OFFSET,
 	.prediv_mask = 0x3800,
 	.prediv_offset = 11,
 	.prediv_val = 1,
@@ -710,8 +706,8 @@ static inline void mxc_init_dvfs_core(void)
  */
 static struct resource dptc_gp_resources[] = {
 	[0] = {
-	       .start = MXC_DPTC_GP_BASE,
-	       .end = MXC_DPTC_GP_BASE + 8 * SZ_16 - 1,
+	       .start = DPTCGP_BASE_ADDR,
+	       .end = DPTCGP_BASE_ADDR + 8 * SZ_16 - 1,
 	       .flags = IORESOURCE_MEM,
 	       },
 	[1] = {
@@ -725,8 +721,8 @@ static struct resource dptc_gp_resources[] = {
 struct mxc_dptc_data dptc_gp_data = {
 	.reg_id = "SW1",
 	.clk_id = "cpu_clk",
-	.dptccr_reg_addr = MXC_GP_DPTCCR,
-	.dcvr0_reg_addr = MXC_GP_DCVR0,
+	.dptccr_reg_addr = MXC_DPTCCR,
+	.dcvr0_reg_addr = MXC_DCVR0,
 	.gpc_cntr_reg_addr = MXC_GPC_CNTR,
 	.dptccr = MXC_GPCCNTR_DPTC0CR,
 	.dptc_wp_supported = DPTC_GP_WP_SUPPORTED,
@@ -754,8 +750,8 @@ struct mxc_dptc_data dptc_gp_data = {
  */
 static struct resource dptc_lp_resources[] = {
 	[0] = {
-	       .start = MXC_DPTC_LP_BASE,
-	       .end = MXC_DPTC_LP_BASE + 8 * SZ_16 - 1,
+	       .start = DPTCLP_BASE_ADDR,
+	       .end = DPTCLP_BASE_ADDR + 8 * SZ_16 - 1,
 	       .flags = IORESOURCE_MEM,
 	       },
 	[1] = {
@@ -769,8 +765,8 @@ static struct resource dptc_lp_resources[] = {
 struct mxc_dptc_data dptc_lp_data = {
 	.reg_id = "SW2",
 	.clk_id = "ahb_clk",
-	.dptccr_reg_addr = MXC_LP_DPTCCR,
-	.dcvr0_reg_addr = MXC_LP_DCVR0,
+	.dptccr_reg_addr = MXC_DPTCCR,
+	.dcvr0_reg_addr = MXC_DCVR0,
 	.gpc_cntr_reg_addr = MXC_GPC_CNTR,
 	.dptccr = MXC_GPCCNTR_DPTC1CR,
 	.dptc_wp_supported = DPTC_LP_WP_SUPPORTED,
@@ -1172,6 +1168,22 @@ static inline void mxc_init_ssi(void)
 }
 #endif /* CONFIG_SND_MXC_SOC_SSI */
 
+static struct platform_device mxc_v4l2_device = {
+	.name = "mxc_v4l2_capture",
+	.id = 0,
+};
+
+static struct platform_device mxc_v4l2out_device = {
+	.name = "mxc_v4l2_output",
+	.id = 0,
+};
+
+static inline void mxc_init_v4l2()
+{
+	platform_device_register(&mxc_v4l2_device);
+	platform_device_register(&mxc_v4l2out_device);
+}
+
 int __init mxc_init_devices(void)
 {
 	mxc_init_wdt();
@@ -1193,6 +1205,7 @@ int __init mxc_init_devices(void)
 	mxc_init_rngc();
 	mxc_init_iim();
 	mxc_init_ssi();
+	mxc_init_v4l2();
 
 	return 0;
 }
-- 
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