From b570e0ec25b371c2e01a1a558e852e2618526817 Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Fri, 11 Dec 2009 16:16:34 -0800 Subject: OMAP4: Fix cpu detection This patch fixes the OMAP4430 cpu detection. The IC rev detection is done with hawkeye and rev. Note that rev does not map directly to defined processor revision numbers as ES1.0 uses value 0.It also fixes the SCM base address to read the correct ID_CODE register. Also the cpu_is_omap44xx() and cpu_is_omap443x() correctly populated instead of always being true Signed-off-by: Santosh Shilimkar Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/id.c | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2/id.c') diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index f48a4b2654dd..3641ba0c16ef 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -246,6 +246,31 @@ void __init omap3_check_revision(void) } } +void __init omap4_check_revision(void) +{ + u32 idcode; + u16 hawkeye; + u8 rev; + char *rev_name = "ES1.0"; + + /* + * The IC rev detection is done with hawkeye and rev. + * Note that rev does not map directly to defined processor + * revision numbers as ES1.0 uses value 0. + */ + idcode = read_tap_reg(OMAP_TAP_IDCODE); + hawkeye = (idcode >> 12) & 0xffff; + rev = (idcode >> 28) & 0xff; + + if ((hawkeye == 0xb852) && (rev == 0x0)) { + omap_revision = OMAP4430_REV_ES1_0; + pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name); + return; + } + + pr_err("Unknown OMAP4 CPU id\n"); +} + #define OMAP3_SHOW_FEATURE(feat) \ if (omap3_has_ ##feat()) \ printk(#feat" "); @@ -336,7 +361,7 @@ void __init omap2_check_revision(void) omap3_check_features(); omap3_cpuinfo(); } else if (cpu_is_omap44xx()) { - printk(KERN_INFO "FIXME: CPU revision = OMAP4430\n"); + omap4_check_revision(); return; } else { pr_err("OMAP revision unknown, please fix!\n"); -- cgit v1.2.3