From cdb216de6e3291493f6bd033f2eec49c80dc8015 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Tue, 4 Jan 2011 18:27:18 +0900 Subject: ARM: S3C64XX: Tidy register and disable clock usage This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Cc: Ben Dooks Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c64xx/clock.c | 19 +++---------------- 1 file changed, 3 insertions(+), 16 deletions(-) (limited to 'arch/arm/mach-s3c64xx/clock.c') diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index 7e03f0ae2fc8..487dfb95d609 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c @@ -127,7 +127,7 @@ int s3c64xx_sclk_ctrl(struct clk *clk, int enable) return s3c64xx_gate(S3C_SCLK_GATE, clk, enable); } -static struct clk init_clocks_disable[] = { +static struct clk init_clocks_off[] = { { .name = "nand", .id = -1, @@ -834,10 +834,6 @@ static struct clk *clks[] __initdata = { void __init s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_divlimit) { - struct clk *clkp; - int ret; - int ptr; - armclk_mask = armclk_divlimit; s3c24xx_register_baseclocks(xtal); @@ -845,17 +841,8 @@ void __init s3c64xx_register_clocks(unsigned long xtal, s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); - clkp = init_clocks_disable; - for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { - - ret = s3c24xx_register_clock(clkp); - if (ret < 0) { - printk(KERN_ERR "Failed to register clock %s (%d)\n", - clkp->name, ret); - } - - (clkp->enable)(clkp, 0); - } + s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); + s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1)); s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); -- cgit v1.2.3