From 5fae405838527c136a920eb7b9a2edfc5d2b6198 Mon Sep 17 00:00:00 2001 From: Pannaga Bhushan Date: Mon, 24 May 2010 15:08:31 +0900 Subject: ARM: S5P: Fix the platform external interrupt issues. This patch does the following: 1. Corrects the common platform code for external interrupts for using the VIC mask/unmask bits also. 2. Moves the common defines related to external interrupt for plat-s5p to common files. 3. Based on the new common defines, corresponding changes are made in the affected platforms (S5P6440, S5P6442 and S5PC100). Signed-off-by: Pannaga Bhushan Signed-off-by: Kukjin Kim Signed-off-by: Ben Dooks --- arch/arm/mach-s5pv210/include/mach/irqs.h | 14 ++------------ arch/arm/mach-s5pv210/include/mach/regs-gpio.h | 14 +++++++++----- 2 files changed, 11 insertions(+), 17 deletions(-) (limited to 'arch/arm/mach-s5pv210') diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h index 92fc6c7fc064..96895378ea27 100644 --- a/arch/arm/mach-s5pv210/include/mach/irqs.h +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h @@ -118,22 +118,12 @@ #define IRQ_MDNIE3 S5P_IRQ_VIC3(8) #define IRQ_VIC_END S5P_IRQ_VIC3(31) -#define S5P_EINT_16_31_BASE (IRQ_VIC_END + 1) - -#define EINT_MODE S3C_GPIO_SFN(0xf) - -#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_IRQ_VIC0(0)) \ - : ((x) + S5P_EINT_16_31_BASE)) +#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) +#define S5P_EINT_BASE2 (IRQ_VIC_END + 1) /* Set the default NR_IRQS */ - #define NR_IRQS (IRQ_EINT(31) + 1) -#define EINT_GPIO_0(x) S5PV210_GPH0(x) -#define EINT_GPIO_1(x) S5PV210_GPH1(x) -#define EINT_GPIO_2(x) S5PV210_GPH2(x) -#define EINT_GPIO_3(x) S5PV210_GPH3(x) - /* Compatibility */ #define IRQ_LCD_FIFO IRQ_LCD0 #define IRQ_LCD_VSYNC IRQ_LCD1 diff --git a/arch/arm/mach-s5pv210/include/mach/regs-gpio.h b/arch/arm/mach-s5pv210/include/mach/regs-gpio.h index 6d068091c36c..49e029b4978a 100644 --- a/arch/arm/mach-s5pv210/include/mach/regs-gpio.h +++ b/arch/arm/mach-s5pv210/include/mach/regs-gpio.h @@ -27,12 +27,9 @@ #define S5PV210_EINT30PEND (S5P_VA_GPIO + 0xF40) #define S5P_EINT_PEND(x) (S5PV210_EINT30PEND + ((x) * 0x4)) -#define eint_offset(irq) ((irq) < IRQ_EINT16_31 ? ((irq) - IRQ_EINT(0)) \ - : ((irq) - S5P_EINT_16_31_BASE)) +#define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3) -#define EINT_REG_NR(x) (eint_offset(x) >> 3) - -#define eint_irq_to_bit(irq) (1 << (eint_offset(irq) & 0x7)) +#define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7)) /* values for S5P_EXTINT0 */ #define S5P_EXTINT_LOWLEV (0x00) @@ -41,4 +38,11 @@ #define S5P_EXTINT_RISEEDGE (0x03) #define S5P_EXTINT_BOTHEDGE (0x04) +#define EINT_MODE S3C_GPIO_SFN(0xf) + +#define EINT_GPIO_0(x) S5PV210_GPH0(x) +#define EINT_GPIO_1(x) S5PV210_GPH1(x) +#define EINT_GPIO_2(x) S5PV210_GPH2(x) +#define EINT_GPIO_3(x) S5PV210_GPH3(x) + #endif /* __ASM_ARCH_REGS_GPIO_H */ -- cgit v1.2.3