From 97f194075b5c332a941751552b467547d7a3ab0a Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Wed, 12 Dec 2012 16:04:46 +0100 Subject: colibri_t20: fix hsync/vsync polarity for default VESA VGA VESA VGA mode defines hsync/vsync to be of polarity low rather than high. --- arch/arm/mach-tegra/board-colibri_t20-panel.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-tegra/board-colibri_t20-panel.c') diff --git a/arch/arm/mach-tegra/board-colibri_t20-panel.c b/arch/arm/mach-tegra/board-colibri_t20-panel.c index 21a992252922..6cb83ce29cf5 100644 --- a/arch/arm/mach-tegra/board-colibri_t20-panel.c +++ b/arch/arm/mach-tegra/board-colibri_t20-panel.c @@ -328,11 +328,11 @@ static struct tegra_fb_data colibri_t20_hdmi_fb_data = { static struct tegra_dc_out_pin colibri_t20_dc_out_pins[] = { { .name = TEGRA_DC_OUT_PIN_H_SYNC, - .pol = TEGRA_DC_OUT_PIN_POL_HIGH, + .pol = TEGRA_DC_OUT_PIN_POL_LOW, }, { .name = TEGRA_DC_OUT_PIN_V_SYNC, - .pol = TEGRA_DC_OUT_PIN_POL_HIGH, + .pol = TEGRA_DC_OUT_PIN_POL_LOW, }, { .name = TEGRA_DC_OUT_PIN_PIXEL_CLOCK, -- cgit v1.2.3