From 4f099034816207f9bae777de15df3aec0ad865a3 Mon Sep 17 00:00:00 2001 From: Jay Cheng Date: Thu, 5 May 2011 16:03:52 -0400 Subject: ARM: tegra: usb: update default UTMIP phy setting Revise some default settings for utimp phy Bug 815848 Reviewed-on: http://git-master/r/30257 (cherry picked from commit 5f2b525a73dd48435975ef72937d1b8627e1c917) Change-Id: I403746d85a3ef32d05bec5867b407f41e1f614e4 Reviewed-on: http://git-master/r/30568 Tested-by: Cho-Che Cheng Reviewed-by: Bharat Nihalani Rebase-Id: R604781894e13c3c82b8e6dec0b20bc24f78ea080 --- arch/arm/mach-tegra/board-ventana.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-tegra/board-ventana.c') diff --git a/arch/arm/mach-tegra/board-ventana.c b/arch/arm/mach-tegra/board-ventana.c index 4a32052ab78f..681fc44e89ed 100644 --- a/arch/arm/mach-tegra/board-ventana.c +++ b/arch/arm/mach-tegra/board-ventana.c @@ -79,7 +79,7 @@ static struct platform_device debug_uart = { static struct tegra_utmip_config utmi_phy_config[] = { [0] = { - .hssync_start_delay = 0, + .hssync_start_delay = 9, .idle_wait_delay = 17, .elastic_limit = 16, .term_range_adj = 6, @@ -88,7 +88,7 @@ static struct tegra_utmip_config utmi_phy_config[] = { .xcvr_lsrslew = 2, }, [1] = { - .hssync_start_delay = 0, + .hssync_start_delay = 9, .idle_wait_delay = 17, .elastic_limit = 16, .term_range_adj = 6, -- cgit v1.2.3