From e5f15bede0770b06e399fc3e41e00f9422cb1018 Mon Sep 17 00:00:00 2001 From: Haley Teng Date: Mon, 2 May 2011 13:59:08 +0800 Subject: ARM: tegra: Modify DDC (i2c2) clock rate as 100KHz Per the 8.4.1 section of HDMI spec version 1.4a, 100KHz is the maximum clock rate of DDC i2c bus. Bug 820552 Original-Change-Id: I7990309c4f3485c9c356623468cfabe25d733604 Signed-off-by: Haley Teng Reviewed-on: http://git-master/r/29966 Reviewed-by: Bharat Nihalani Reviewed-by: Alok Chauhan Rebase-Id: Rb653b99d7f392767c04e910077c132e2f52b867d --- arch/arm/mach-tegra/board-ventana.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-tegra/board-ventana.c') diff --git a/arch/arm/mach-tegra/board-ventana.c b/arch/arm/mach-tegra/board-ventana.c index fd7798dc615a..438e9b381572 100644 --- a/arch/arm/mach-tegra/board-ventana.c +++ b/arch/arm/mach-tegra/board-ventana.c @@ -178,7 +178,7 @@ static const struct tegra_pingroup_config i2c2_gen2 = { static struct tegra_i2c_platform_data ventana_i2c2_platform_data = { .adapter_nr = 1, .bus_count = 2, - .bus_clk_rate = { 400000, 10000 }, + .bus_clk_rate = { 100000, 10000 }, .bus_mux = { &i2c2_ddc, &i2c2_gen2 }, .bus_mux_len = { 1, 1 }, .slave_addr = 0x00FC, -- cgit v1.2.3