From 3a50dd6e2b0183e9189ab746296d9ff6398fb86d Mon Sep 17 00:00:00 2001 From: Alex Frid Date: Thu, 1 Mar 2012 15:20:40 -0800 Subject: ARM: tegra: clock: Set SCLK floor for CPU mode switch Set SCLK floor to 80MHz for Tegra3 CPU mode switch. Bug 933984 Change-Id: Ibbb0a24cd763c11b3cead60efe26096bae3e6ddd Signed-off-by: Alex Frid Reviewed-on: http://git-master/r/106035 Reviewed-by: Prajakta Gudadhe Tested-by: Jay Cheng (cherry picked from commit 842f7ddb7a188e36a2ff153dc0d8ed38b5e28319) Reviewed-on: http://git-master/r/113981 Reviewed-by: Simone Willett Tested-by: Simone Willett --- arch/arm/mach-tegra/common.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-tegra/common.c') diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 59b4f954ee79..aa6f0192c5d2 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -217,6 +217,7 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = { { "sbc5.sclk", NULL, 40000000, false}, { "sbc6.sclk", NULL, 40000000, false}, { "wake.sclk", NULL, 40000000, true }, + { "cpu_mode.sclk", NULL, 80000000, false }, { "cbus", "pll_c", 416000000, false }, { "pll_c_out1", "pll_c", 208000000, false }, { "mselect", "pll_p", 102000000, true }, -- cgit v1.2.3