From 51efb6b201d3a0939e684ef2b530fe485da32531 Mon Sep 17 00:00:00 2001 From: Antti P Miettinen Date: Tue, 14 Aug 2012 13:14:00 +0300 Subject: ARM: tegra: power: Trace LP2 entry and exit Add traces for measuring LP2 entry/exit times. Bug 960304 Change-Id: I20bb0f8d55a7ed6f7e88e10d924871a3d09f2507 Signed-off-by: Antti P Miettinen Reviewed-on: http://git-master/r/123313 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Juha Tukkinen --- arch/arm/mach-tegra/cpuidle.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm/mach-tegra/cpuidle.c') diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c index 47d5996e5961..9d36d0fac5d8 100644 --- a/arch/arm/mach-tegra/cpuidle.c +++ b/arch/arm/mach-tegra/cpuidle.c @@ -45,6 +45,7 @@ #include "cpuidle.h" #include "pm.h" #include "sleep.h" +#include "timer.h" int tegra_lp2_exit_latency; static int tegra_lp2_power_off_time; @@ -117,12 +118,20 @@ static int tegra_idle_enter_lp2(struct cpuidle_device *dev, return tegra_idle_enter_lp3(dev, state); } + trace_printk("LP2 entry at %lu us\n", + (unsigned long)readl(IO_ADDRESS(TEGRA_TMR1_BASE) + + TIMERUS_CNTR_1US)); + local_irq_disable(); enter = ktime_get(); tegra_cpu_idle_stats_lp2_ready(dev->cpu); tegra_idle_lp2(dev, state); + trace_printk("LP2 exit at %lu us\n", + (unsigned long)readl(IO_ADDRESS(TEGRA_TMR1_BASE) + + TIMERUS_CNTR_1US)); + exit = ktime_sub(ktime_get(), enter); us = ktime_to_us(exit); -- cgit v1.2.3