From c2c2c2880411ffdbe7f118c5e9cd7255e3ea4472 Mon Sep 17 00:00:00 2001 From: Scott Williams Date: Fri, 22 Jul 2011 13:21:08 -0700 Subject: ARM: tegra: Add LP2 exit latency correction Change-Id: I37cb57f8674d8ddea3861fdc59543c3dfa8498db Signed-off-by: Scott Williams DW: Split into logical changes Signed-off-by: Dan Willemsen Rebase-Id: R0a1d0c79e22f9191bde70b8b05541c5bfe26f4df --- arch/arm/mach-tegra/cpuidle.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-tegra/cpuidle.c') diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c index 712ac003224f..5cd341763adc 100644 --- a/arch/arm/mach-tegra/cpuidle.c +++ b/arch/arm/mach-tegra/cpuidle.c @@ -49,6 +49,7 @@ static bool lp2_in_idle __read_mostly = true; module_param(lp2_in_idle, bool, 0644); static bool lp2_disabled_by_suspend; +int tegra_lp2_exit_latency; static unsigned int tegra_lp2_min_residency; #endif -- cgit v1.2.3