From 4f5892b1c1aa1ffb085333bb2412464a66910a99 Mon Sep 17 00:00:00 2001 From: Alex Frid Date: Wed, 14 Dec 2011 15:28:44 -0800 Subject: ARM: tegra: dvfs: Add cold zone Tegra3 CPU dvfs limits Added alternative frequency limits for Tegra3 CPU. These limits are applied only in the lowest CPU EDP temperature zone, and the offset from regular Tegra3 dvfs frequencies is set at -50MHz at all scaling voltage steps. Offset values as well as temperature threshold are to be updated per characterization. Bug 913884 Change-Id: Ia420f54b4c9fdc966e44d0269d45d9164d751b5f Signed-off-by: Alex Frid Reviewed-on: http://git-master/r/70189 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Diwakar Tundlam Tested-by: Diwakar Tundlam Reviewed-by: Krishna Reddy Reviewed-on: http://git-master/r/75615 Reviewed-by: Varun Wadekar Tested-by: Varun Wadekar --- arch/arm/mach-tegra/dvfs.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/mach-tegra/dvfs.h') diff --git a/arch/arm/mach-tegra/dvfs.h b/arch/arm/mach-tegra/dvfs.h index f7e863f14f39..eaecf425fe87 100644 --- a/arch/arm/mach-tegra/dvfs.h +++ b/arch/arm/mach-tegra/dvfs.h @@ -125,6 +125,7 @@ int tegra_dvfs_predict_millivolts(struct clk *c, unsigned long rate); void tegra_dvfs_core_cap_enable(bool enable); void tegra_dvfs_core_cap_level_set(int level); int tegra_dvfs_alt_freqs_set(struct dvfs *d, bool enable); +void tegra_cpu_dvfs_alter(int edp_thermal_index, bool before_clk_update); #else static inline void tegra_soc_init_dvfs(void) {} @@ -161,6 +162,9 @@ static inline void tegra_dvfs_core_cap_level_set(int level) {} static inline int tegra_dvfs_alt_freqs_set(struct dvfs *d, bool enable) { return 0; } +static inline void tegra_cpu_dvfs_alter(int edp_thermal_index, + bool before_clk_update) +{} #endif #ifndef CONFIG_ARCH_TEGRA_2x_SOC -- cgit v1.2.3