From bbd494faa3f6efd86dcc015bec54d1ae07a464f2 Mon Sep 17 00:00:00 2001 From: Alex Frid Date: Mon, 16 May 2011 19:36:03 -0700 Subject: ARM: tegra: clock: Set Tegra3 CPU maximum rate to 1.4GHz - Added CPU DVFS tables for Tegra3 chips with 1.4GHz support - Updated speedo thresholds for process corners - Set Tegra3 CPU maximum rate to 1.4MHz. Effective only on boards with EDP table. Otherwise, the default EDP limit keeps rate below 1GHz. Original-Change-Id: Iaca3bb6a5fbfa1bf76131f49d08162fdbe35143f Reviewed-on: http://git-master/r/31887 Reviewed-by: Niket Sirsi Tested-by: Niket Sirsi Rebase-Id: R6f077fe6e698d3b4fa7ed475e1926de648208e18 --- arch/arm/mach-tegra/tegra3_speedo.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-tegra/tegra3_speedo.c') diff --git a/arch/arm/mach-tegra/tegra3_speedo.c b/arch/arm/mach-tegra/tegra3_speedo.c index 6377b9347dd9..9786c6bee06c 100644 --- a/arch/arm/mach-tegra/tegra3_speedo.c +++ b/arch/arm/mach-tegra/tegra3_speedo.c @@ -40,9 +40,9 @@ static const u32 core_process_speedos[][PROCESS_CORNERS_NUM] = { /* Maximum speedo levels for each CPU process corner */ static const u32 cpu_process_speedos[][PROCESS_CORNERS_NUM] = { // proc_id 0 1 2 3 - {305, 337, 360, 376}, // soc_speedo_id 0 - {337, 337, 360, 376}, // soc_speedo_id 1 - {305, 337, 360, 376}, // soc_speedo_id 2 + {306, 338, 360, 376}, // soc_speedo_id 0 + {306, 338, 360, 376}, // soc_speedo_id 1 + {338, 338, 360, 376}, // soc_speedo_id 2 }; static int cpu_process_id; -- cgit v1.2.3