From b3a8b751c1c2997653c6bf2b5d10467c39f3cc6e Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Sat, 10 May 2008 21:05:31 +0100 Subject: [ARM] 5034/1: fix arm{925,926,940,946} dma_flush_range() in WT mode The CPU's dma_flush_range() operation needs to clean+invalidate the given memory area if the cache is in writeback mode, or do just the invalidate part if the cache is in writethrough mode, but the current proc-arm{925,926,940,946} (incorrectly) do a cache clean in the latter case. This patch fixes that. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- arch/arm/mm/proc-arm946.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mm/proc-arm946.S') diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S index 2218b0c01330..82d579ac9b98 100644 --- a/arch/arm/mm/proc-arm946.S +++ b/arch/arm/mm/proc-arm946.S @@ -265,7 +265,7 @@ ENTRY(arm946_dma_flush_range) #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry #else - mcr p15, 0, r0, c7, c10, 1 @ clean D entry + mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry #endif add r0, r0, #CACHE_DLINESIZE cmp r0, r1 -- cgit v1.2.3