From a9fe468f1b7d369467fffc8357577d2ffb4e73fd Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Fri, 18 Jul 2014 12:13:28 +0200 Subject: ARM: tegra: Add memory controller support for Tegra30 Collapses the old memory-controller and IOMMU device tree nodes into a single node to more accurately describe the hardware. While this is an incompatible change there are no users of the IOMMU on Tegra, even though a driver has existed for some time. Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30.dtsi | 20 ++++++-------------- 1 file changed, 6 insertions(+), 14 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index aa6ccea13d30..fa7e5b642434 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -623,23 +623,15 @@ clock-names = "pclk", "clk32k_in"; }; - memory-controller@7000f000 { + mc: memory-controller@7000f000 { compatible = "nvidia,tegra30-mc"; - reg = <0x7000f000 0x010 - 0x7000f03c 0x1b4 - 0x7000f200 0x028 - 0x7000f284 0x17c>; + reg = <0x7000f000 0x400>; + clocks = <&tegra_car TEGRA30_CLK_MC>; + clock-names = "mc"; + interrupts = ; - }; - iommu@7000f010 { - compatible = "nvidia,tegra30-smmu"; - reg = <0x7000f010 0x02c - 0x7000f1f0 0x010 - 0x7000f228 0x05c>; - nvidia,#asids = <4>; /* # of ASIDs */ - dma-window = <0 0x40000000>; /* IOVA start & length */ - nvidia,ahb = <&ahb>; + #iommu-cells = <1>; }; fuse@7000f800 { -- cgit v1.2.3