From dce7505e6a4c03c49d9033be58aabee624661179 Mon Sep 17 00:00:00 2001 From: Xie Xiaobo Date: Tue, 9 Nov 2010 11:03:48 +0800 Subject: ENGR00133511 MX28: Fixed 1588 clock divider setting error 1588 clock need to set divider in HW_CLKCTRL_ENET register, and these bits should be cleaned before set them. Signed-off-by: Xie Xiaobo --- arch/arm/mach-mx28/clock.c | 4 +++- arch/arm/mach-mx28/regs-clkctrl.h | 1 - 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mx28/clock.c b/arch/arm/mach-mx28/clock.c index 2232afb0199b..418c27f746bb 100644 --- a/arch/arm/mach-mx28/clock.c +++ b/arch/arm/mach-mx28/clock.c @@ -1771,7 +1771,9 @@ void mx28_enet_clk_hook(void) reg &= ~BM_CLKCTRL_ENET_SLEEP; reg |= BM_CLKCTRL_ENET_CLK_OUT_EN; /* select clock for 1588 module */ - reg |= BM_CLKCTRL_ENET_1588_40MHZ; + reg &= ~(BM_CLKCTRL_ENET_DIV_TIME | BM_CLKCTRL_ENET_TIME_SEL); + reg |= BF_CLKCTRL_ENET_TIME_SEL(BV_CLKCTRL_ENET_TIME_SEL__PLL) + | BF_CLKCTRL_ENET_DIV_TIME(12); __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET); } diff --git a/arch/arm/mach-mx28/regs-clkctrl.h b/arch/arm/mach-mx28/regs-clkctrl.h index 9de19275fa91..161860c2fcf0 100644 --- a/arch/arm/mach-mx28/regs-clkctrl.h +++ b/arch/arm/mach-mx28/regs-clkctrl.h @@ -478,7 +478,6 @@ #define BM_CLKCTRL_ENET_RSRVD0 0x0000FFFF #define BF_CLKCTRL_ENET_RSRVD0(v) \ (((v) << 0) & BM_CLKCTRL_ENET_RSRVD0) -#define BM_CLKCTRL_ENET_1588_40MHZ 0x01880000 #define HW_CLKCTRL_HSADC (0x00000150) -- cgit v1.2.3