From 9255f6fd453e1ba7ffa58427a04c52f68b96862f Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 23 Sep 2016 10:28:40 +0200 Subject: ARM: shmobile: Sort Kconfig selections Sort alphabetically all symbols selected by ARCH_RENESAS Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Kconfig | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 09817bae4558..84fd4e959147 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -32,15 +32,15 @@ config ARCH_RMOBILE menuconfig ARCH_RENESAS bool "Renesas ARM SoCs" depends on ARCH_MULTI_V7 && MMU + select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE select ARCH_SHMOBILE select ARCH_SHMOBILE_MULTI + select ARM_GIC + select GPIOLIB select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP - select ARM_GIC - select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE select NO_IOPORT_MAP select PINCTRL - select GPIOLIB select ZONE_DMA if ARM_LPAE if ARCH_RENESAS -- cgit v1.2.3 From 525d4015e633027c93645208a9bb9a6ce8d3f5a6 Mon Sep 17 00:00:00 2001 From: Lorenzo Pieralisi Date: Fri, 23 Sep 2016 14:09:06 +0100 Subject: ARM: vexpress: refine MCPM smp operations override criteria Current vexpress smp init code detects whether to override the default smp ops with MCPM smp ops by matching the "cci-400" compatible string, in that MCPM requires control over CCI ports to manage low-power states entry/exit. The "cci-400" compatible string check is a necessary but not sufficient condition for MCPM to work, because the cci-400 can be made visible to the kernel, but firmware can nonetheless disable non-secure CCI ports control, while still allowing PMU access; if booted in non-secure world, the kernel would still blindly override smp operations with MCPM operations, resulting in kernel faults when the CCI ports programming interface is accessed from non-secure world. This means that the "cci-400" compatible string check would result in a false positive in systems that eg boot in HYP mode, where CCI ports non-secure access is explicitly not allowed, and it is reported in the respective device tree nodes with CCI ports marked as disabled. Refactor the smp operations initialization to make sure that the kernel is actually allowed to take control over CCI ports (by enabling MCPM smp operations) before overriding default vexpress smp operations. Cc: Liviu Dudau Cc: Marc Zyngier Acked-by: Nicolas Pitre Tested-by: Jon Medhurst Signed-off-by: Lorenzo Pieralisi Signed-off-by: Sudeep Holla --- arch/arm/mach-vexpress/platsmp.c | 34 ++++++++++++++++++++++++++-------- 1 file changed, 26 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c index 8b8d0724f6c6..98e29dee91e8 100644 --- a/arch/arm/mach-vexpress/platsmp.c +++ b/arch/arm/mach-vexpress/platsmp.c @@ -26,19 +26,37 @@ bool __init vexpress_smp_init_ops(void) { #ifdef CONFIG_MCPM + int cpu; + struct device_node *cpu_node, *cci_node; + /* - * The best way to detect a multi-cluster configuration at the moment - * is to look for the presence of a CCI in the system. + * The best way to detect a multi-cluster configuration + * is to detect if the kernel can take over CCI ports + * control. Loop over possible CPUs and check if CCI + * port control is available. * Override the default vexpress_smp_ops if so. */ - struct device_node *node; - node = of_find_compatible_node(NULL, NULL, "arm,cci-400"); - if (node && of_device_is_available(node)) { - mcpm_smp_set_ops(); - return true; + for_each_possible_cpu(cpu) { + bool available; + + cpu_node = of_get_cpu_node(cpu, NULL); + if (WARN(!cpu_node, "Missing cpu device node!")) + return false; + + cci_node = of_parse_phandle(cpu_node, "cci-control-port", 0); + available = cci_node && of_device_is_available(cci_node); + of_node_put(cci_node); + of_node_put(cpu_node); + + if (!available) + return false; } -#endif + + mcpm_smp_set_ops(); + return true; +#else return false; +#endif } static const struct of_device_id vexpress_smp_dt_scu_match[] __initconst = { -- cgit v1.2.3 From d6ea689345ecc27b636a8bb62bf07080f21f110c Mon Sep 17 00:00:00 2001 From: Markus Elfring Date: Sun, 16 Oct 2016 12:30:48 +0200 Subject: ARM/orion/gpio: Replace three seq_printf() calls by seq_puts() in orion_gpio_dbg_show() Strings which did not contain data format specifications should be put into a sequence. Thus use the corresponding function "seq_puts". This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring Reviewed-by: Andrew Lunn Signed-off-by: Gregory CLEMENT --- arch/arm/plat-orion/gpio.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c index f74069386c13..26a531ebb6e9 100644 --- a/arch/arm/plat-orion/gpio.c +++ b/arch/arm/plat-orion/gpio.c @@ -478,13 +478,13 @@ static void orion_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) (data_in ^ in_pol) & msk ? "hi" : "lo", in_pol & msk ? "lo" : "hi"); if (!((edg_msk | lvl_msk) & msk)) { - seq_printf(s, " disabled\n"); + seq_puts(s, " disabled\n"); continue; } if (edg_msk & msk) - seq_printf(s, " edge "); + seq_puts(s, " edge "); if (lvl_msk & msk) - seq_printf(s, " level"); + seq_puts(s, " level"); seq_printf(s, " (%s)\n", cause & msk ? "pending" : "clear "); } } -- cgit v1.2.3 From f4e14edf25661f32c9e7323d8a482b8632a6f47f Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Mon, 19 Sep 2016 21:12:13 +0200 Subject: ARM: sa11x0/pxa: acquire timer rate from the clock rate As both pxa and sa1100 provide a clock to the timer, the rate can be inferred from the clock rather than hard encoded in a functional call. This patch changes the pxa timer to have a mandatory clock which is used as the timer rate. Signed-off-by: Robert Jarzmik Acked-by: Daniel Lezcano Acked-by: Russell King --- arch/arm/mach-pxa/generic.c | 3 +-- arch/arm/mach-sa1100/generic.c | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index ec510ecf8370..2a9297991d74 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c @@ -69,8 +69,7 @@ void __init pxa_timer_init(void) pxa27x_clocks_init(); if (cpu_is_pxa3xx()) pxa3xx_clocks_init(); - pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000), - get_clock_tick_rate()); + pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x40a00000)); } /* diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c index 3e09beddb6e8..2eb00691b07d 100644 --- a/arch/arm/mach-sa1100/generic.c +++ b/arch/arm/mach-sa1100/generic.c @@ -378,7 +378,7 @@ void __init sa1100_map_io(void) void __init sa1100_timer_init(void) { - pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x90000000), 3686400); + pxa_timer_nodt_init(IRQ_OST0, io_p2v(0x90000000)); } static struct resource irq_resource = -- cgit v1.2.3 From d3570e3c5002d514582cad09d6892a4c78c3781b Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Mon, 19 Sep 2016 21:12:15 +0200 Subject: ARM: sa11x0/pxa: get rid of get_clock_tick_rate The last user of this function is gone, so remove it. The clock API should now be used to get clock rates. Signed-off-by: Robert Jarzmik Acked-by: Daniel Lezcano Acked-by: Russell King --- arch/arm/mach-pxa/generic.c | 15 --------------- arch/arm/mach-pxa/include/mach/hardware.h | 2 -- arch/arm/mach-sa1100/include/mach/hardware.h | 4 ---- 3 files changed, 21 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index 2a9297991d74..cb73a9723d0e 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c @@ -43,21 +43,6 @@ void clear_reset_status(unsigned int mask) } } -unsigned long get_clock_tick_rate(void) -{ - unsigned long clock_tick_rate; - - if (cpu_is_pxa25x()) - clock_tick_rate = 3686400; - else if (machine_is_mainstone()) - clock_tick_rate = 3249600; - else - clock_tick_rate = 3250000; - - return clock_tick_rate; -} -EXPORT_SYMBOL(get_clock_tick_rate); - /* * For non device-tree builds, keep legacy timer init */ diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index 8d63c211b22f..55064124ca4e 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h @@ -303,8 +303,6 @@ */ extern unsigned int get_memclk_frequency_10khz(void); -/* return the clock tick rate of the OS timer */ -extern unsigned long get_clock_tick_rate(void); #endif #endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/mach-sa1100/include/mach/hardware.h b/arch/arm/mach-sa1100/include/mach/hardware.h index d944fd7e464f..52b8f6d25bef 100644 --- a/arch/arm/mach-sa1100/include/mach/hardware.h +++ b/arch/arm/mach-sa1100/include/mach/hardware.h @@ -43,10 +43,6 @@ # define __REG(x) (*((volatile unsigned long __iomem *)io_p2v(x))) # define __PREG(x) (io_v2p((unsigned long)&(x))) -static inline unsigned long get_clock_tick_rate(void) -{ - return 3686400; -} #else # define __REG(x) io_p2v(x) -- cgit v1.2.3 From 3738ca1b2a7bae482e2d29485414a1dc1a946153 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Mon, 26 Sep 2016 09:21:28 +0200 Subject: ARM: pxa: pxa_cplds: honor probe deferral The method to acquire the input interrupt was working in a platform data based board, but was failing in a device-tree one when the gpio controller was probed after pxa_cplds. Use platform_get_irq() to benefit from the probe deferral mechanism. Moreover, as seen in dm9000.c development, platform_get_irq() doesn't honor the irq type IO resource (ie. edge rising for example), and it must be passed again at irq request in a not device-tree build, hence the irq_get_trigger_type() call. Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/pxa_cplds_irqs.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-pxa/pxa_cplds_irqs.c b/arch/arm/mach-pxa/pxa_cplds_irqs.c index e362f865fcd2..941508585e34 100644 --- a/arch/arm/mach-pxa/pxa_cplds_irqs.c +++ b/arch/arm/mach-pxa/pxa_cplds_irqs.c @@ -120,13 +120,9 @@ static int cplds_probe(struct platform_device *pdev) if (!fpga) return -ENOMEM; - res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (res) { - fpga->irq = (unsigned int)res->start; - irqflags = res->flags; - } - if (!fpga->irq) - return -ENODEV; + fpga->irq = platform_get_irq(pdev, 0); + if (fpga->irq <= 0) + return fpga->irq; base_irq = platform_get_irq(pdev, 1); if (base_irq < 0) @@ -142,6 +138,7 @@ static int cplds_probe(struct platform_device *pdev) writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); writel(0, fpga->base + FPGA_IRQ_SET_CLR); + irqflags = irq_get_trigger_type(fpga->irq); ret = devm_request_irq(&pdev->dev, fpga->irq, cplds_irq_handler, irqflags, dev_name(&pdev->dev), fpga); if (ret == -ENOSYS) -- cgit v1.2.3 From e76bdfd7403aae582461901955d0136381e34435 Mon Sep 17 00:00:00 2001 From: Zhengyu Shen Date: Mon, 19 Sep 2016 12:57:29 -0500 Subject: ARM: imx: Added perf functionality to mmdc driver MMDC is a multi-mode DDR controller that supports DDR3/DDR3L x16/x32/x64 and LPDDR2 two channel x16/x32 memory types. MMDC is configurable, high performance, and optimized. MMDC is present on i.MX6 Quad and i.MX6 QuadPlus devices, but this driver only supports i.MX6 Quad at the moment. MMDC provides registers for performance counters which read via this driver to help debug memory throughput and similar issues. $ perf stat -a -e mmdc/busy-cycles/,mmdc/read-accesses/,mmdc/read-bytes/,mmdc/total-cycles/,mmdc/write-accesses/,mmdc/write-bytes/ dd if=/dev/zero of=/dev/null bs=1M count=5000 Performance counter stats for 'dd if=/dev/zero of=/dev/null bs=1M count=5000': 898021787 mmdc/busy-cycles/ 14819600 mmdc/read-accesses/ 471.30 MB mmdc/read-bytes/ 2815419216 mmdc/total-cycles/ 13367354 mmdc/write-accesses/ 427.76 MB mmdc/write-bytes/ 5.334757334 seconds time elapsed Signed-off-by: Zhengyu Shen Signed-off-by: Frank Li Signed-off-by: Shawn Guo --- arch/arm/mach-imx/mmdc.c | 459 ++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 457 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/mmdc.c b/arch/arm/mach-imx/mmdc.c index db9621c718ec..d82d14ceb2e9 100644 --- a/arch/arm/mach-imx/mmdc.c +++ b/arch/arm/mach-imx/mmdc.c @@ -1,5 +1,5 @@ /* - * Copyright 2011 Freescale Semiconductor, Inc. + * Copyright 2011,2016 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. * * The code contained herein is licensed under the GNU General Public @@ -10,12 +10,16 @@ * http://www.gnu.org/copyleft/gpl.html */ +#include #include +#include #include #include #include #include #include +#include +#include #include "common.h" @@ -27,8 +31,458 @@ #define BM_MMDC_MDMISC_DDR_TYPE 0x18 #define BP_MMDC_MDMISC_DDR_TYPE 0x3 +#define TOTAL_CYCLES 0x0 +#define BUSY_CYCLES 0x1 +#define READ_ACCESSES 0x2 +#define WRITE_ACCESSES 0x3 +#define READ_BYTES 0x4 +#define WRITE_BYTES 0x5 + +/* Enables, resets, freezes, overflow profiling*/ +#define DBG_DIS 0x0 +#define DBG_EN 0x1 +#define DBG_RST 0x2 +#define PRF_FRZ 0x4 +#define CYC_OVF 0x8 + +#define MMDC_MADPCR0 0x410 +#define MMDC_MADPSR0 0x418 +#define MMDC_MADPSR1 0x41C +#define MMDC_MADPSR2 0x420 +#define MMDC_MADPSR3 0x424 +#define MMDC_MADPSR4 0x428 +#define MMDC_MADPSR5 0x42C + +#define MMDC_NUM_COUNTERS 6 + +#define to_mmdc_pmu(p) container_of(p, struct mmdc_pmu, pmu) + static int ddr_type; +#ifdef CONFIG_PERF_EVENTS + +static DEFINE_IDA(mmdc_ida); + +PMU_EVENT_ATTR_STRING(total-cycles, mmdc_pmu_total_cycles, "event=0x00") +PMU_EVENT_ATTR_STRING(busy-cycles, mmdc_pmu_busy_cycles, "event=0x01") +PMU_EVENT_ATTR_STRING(read-accesses, mmdc_pmu_read_accesses, "event=0x02") +PMU_EVENT_ATTR_STRING(write-accesses, mmdc_pmu_write_accesses, "config=0x03") +PMU_EVENT_ATTR_STRING(read-bytes, mmdc_pmu_read_bytes, "event=0x04") +PMU_EVENT_ATTR_STRING(read-bytes.unit, mmdc_pmu_read_bytes_unit, "MB"); +PMU_EVENT_ATTR_STRING(read-bytes.scale, mmdc_pmu_read_bytes_scale, "0.000001"); +PMU_EVENT_ATTR_STRING(write-bytes, mmdc_pmu_write_bytes, "event=0x05") +PMU_EVENT_ATTR_STRING(write-bytes.unit, mmdc_pmu_write_bytes_unit, "MB"); +PMU_EVENT_ATTR_STRING(write-bytes.scale, mmdc_pmu_write_bytes_scale, "0.000001"); + +struct mmdc_pmu { + struct pmu pmu; + void __iomem *mmdc_base; + cpumask_t cpu; + struct hrtimer hrtimer; + unsigned int active_events; + struct device *dev; + struct perf_event *mmdc_events[MMDC_NUM_COUNTERS]; + struct hlist_node node; +}; + +/* + * Polling period is set to one second, overflow of total-cycles (the fastest + * increasing counter) takes ten seconds so one second is safe + */ +static unsigned int mmdc_pmu_poll_period_us = 1000000; + +module_param_named(pmu_pmu_poll_period_us, mmdc_pmu_poll_period_us, uint, + S_IRUGO | S_IWUSR); + +static ktime_t mmdc_pmu_timer_period(void) +{ + return ns_to_ktime((u64)mmdc_pmu_poll_period_us * 1000); +} + +static ssize_t mmdc_pmu_cpumask_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct mmdc_pmu *pmu_mmdc = dev_get_drvdata(dev); + + return cpumap_print_to_pagebuf(true, buf, &pmu_mmdc->cpu); +} + +static struct device_attribute mmdc_pmu_cpumask_attr = + __ATTR(cpumask, S_IRUGO, mmdc_pmu_cpumask_show, NULL); + +static struct attribute *mmdc_pmu_cpumask_attrs[] = { + &mmdc_pmu_cpumask_attr.attr, + NULL, +}; + +static struct attribute_group mmdc_pmu_cpumask_attr_group = { + .attrs = mmdc_pmu_cpumask_attrs, +}; + +static struct attribute *mmdc_pmu_events_attrs[] = { + &mmdc_pmu_total_cycles.attr.attr, + &mmdc_pmu_busy_cycles.attr.attr, + &mmdc_pmu_read_accesses.attr.attr, + &mmdc_pmu_write_accesses.attr.attr, + &mmdc_pmu_read_bytes.attr.attr, + &mmdc_pmu_read_bytes_unit.attr.attr, + &mmdc_pmu_read_bytes_scale.attr.attr, + &mmdc_pmu_write_bytes.attr.attr, + &mmdc_pmu_write_bytes_unit.attr.attr, + &mmdc_pmu_write_bytes_scale.attr.attr, + NULL, +}; + +static struct attribute_group mmdc_pmu_events_attr_group = { + .name = "events", + .attrs = mmdc_pmu_events_attrs, +}; + +PMU_FORMAT_ATTR(event, "config:0-63"); +static struct attribute *mmdc_pmu_format_attrs[] = { + &format_attr_event.attr, + NULL, +}; + +static struct attribute_group mmdc_pmu_format_attr_group = { + .name = "format", + .attrs = mmdc_pmu_format_attrs, +}; + +static const struct attribute_group *attr_groups[] = { + &mmdc_pmu_events_attr_group, + &mmdc_pmu_format_attr_group, + &mmdc_pmu_cpumask_attr_group, + NULL, +}; + +static u32 mmdc_pmu_read_counter(struct mmdc_pmu *pmu_mmdc, int cfg) +{ + void __iomem *mmdc_base, *reg; + + mmdc_base = pmu_mmdc->mmdc_base; + + switch (cfg) { + case TOTAL_CYCLES: + reg = mmdc_base + MMDC_MADPSR0; + break; + case BUSY_CYCLES: + reg = mmdc_base + MMDC_MADPSR1; + break; + case READ_ACCESSES: + reg = mmdc_base + MMDC_MADPSR2; + break; + case WRITE_ACCESSES: + reg = mmdc_base + MMDC_MADPSR3; + break; + case READ_BYTES: + reg = mmdc_base + MMDC_MADPSR4; + break; + case WRITE_BYTES: + reg = mmdc_base + MMDC_MADPSR5; + break; + default: + return WARN_ONCE(1, + "invalid configuration %d for mmdc counter", cfg); + } + return readl(reg); +} + +static int mmdc_pmu_offline_cpu(unsigned int cpu, struct hlist_node *node) +{ + struct mmdc_pmu *pmu_mmdc = hlist_entry_safe(node, struct mmdc_pmu, node); + int target; + + if (!cpumask_test_and_clear_cpu(cpu, &pmu_mmdc->cpu)) + return 0; + + target = cpumask_any_but(cpu_online_mask, cpu); + if (target >= nr_cpu_ids) + return 0; + + perf_pmu_migrate_context(&pmu_mmdc->pmu, cpu, target); + cpumask_set_cpu(target, &pmu_mmdc->cpu); + + return 0; +} + +static bool mmdc_pmu_group_event_is_valid(struct perf_event *event, + struct pmu *pmu, + unsigned long *used_counters) +{ + int cfg = event->attr.config; + + if (is_software_event(event)) + return true; + + if (event->pmu != pmu) + return false; + + return !test_and_set_bit(cfg, used_counters); +} + +/* + * Each event has a single fixed-purpose counter, so we can only have a + * single active event for each at any point in time. Here we just check + * for duplicates, and rely on mmdc_pmu_event_init to verify that the HW + * event numbers are valid. + */ +static bool mmdc_pmu_group_is_valid(struct perf_event *event) +{ + struct pmu *pmu = event->pmu; + struct perf_event *leader = event->group_leader; + struct perf_event *sibling; + unsigned long counter_mask = 0; + + set_bit(leader->attr.config, &counter_mask); + + if (event != leader) { + if (!mmdc_pmu_group_event_is_valid(event, pmu, &counter_mask)) + return false; + } + + list_for_each_entry(sibling, &leader->sibling_list, group_entry) { + if (!mmdc_pmu_group_event_is_valid(sibling, pmu, &counter_mask)) + return false; + } + + return true; +} + +static int mmdc_pmu_event_init(struct perf_event *event) +{ + struct mmdc_pmu *pmu_mmdc = to_mmdc_pmu(event->pmu); + int cfg = event->attr.config; + + if (event->attr.type != event->pmu->type) + return -ENOENT; + + if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK) + return -EOPNOTSUPP; + + if (event->cpu < 0) { + dev_warn(pmu_mmdc->dev, "Can't provide per-task data!\n"); + return -EOPNOTSUPP; + } + + if (event->attr.exclude_user || + event->attr.exclude_kernel || + event->attr.exclude_hv || + event->attr.exclude_idle || + event->attr.exclude_host || + event->attr.exclude_guest || + event->attr.sample_period) + return -EINVAL; + + if (cfg < 0 || cfg >= MMDC_NUM_COUNTERS) + return -EINVAL; + + if (!mmdc_pmu_group_is_valid(event)) + return -EINVAL; + + event->cpu = cpumask_first(&pmu_mmdc->cpu); + return 0; +} + +static void mmdc_pmu_event_update(struct perf_event *event) +{ + struct mmdc_pmu *pmu_mmdc = to_mmdc_pmu(event->pmu); + struct hw_perf_event *hwc = &event->hw; + u64 delta, prev_raw_count, new_raw_count; + + do { + prev_raw_count = local64_read(&hwc->prev_count); + new_raw_count = mmdc_pmu_read_counter(pmu_mmdc, + event->attr.config); + } while (local64_cmpxchg(&hwc->prev_count, prev_raw_count, + new_raw_count) != prev_raw_count); + + delta = (new_raw_count - prev_raw_count) & 0xFFFFFFFF; + + local64_add(delta, &event->count); +} + +static void mmdc_pmu_event_start(struct perf_event *event, int flags) +{ + struct mmdc_pmu *pmu_mmdc = to_mmdc_pmu(event->pmu); + struct hw_perf_event *hwc = &event->hw; + void __iomem *mmdc_base, *reg; + + mmdc_base = pmu_mmdc->mmdc_base; + reg = mmdc_base + MMDC_MADPCR0; + + /* + * hrtimer is required because mmdc does not provide an interrupt so + * polling is necessary + */ + hrtimer_start(&pmu_mmdc->hrtimer, mmdc_pmu_timer_period(), + HRTIMER_MODE_REL_PINNED); + + local64_set(&hwc->prev_count, 0); + + writel(DBG_RST, reg); + writel(DBG_EN, reg); +} + +static int mmdc_pmu_event_add(struct perf_event *event, int flags) +{ + struct mmdc_pmu *pmu_mmdc = to_mmdc_pmu(event->pmu); + struct hw_perf_event *hwc = &event->hw; + + int cfg = event->attr.config; + + if (flags & PERF_EF_START) + mmdc_pmu_event_start(event, flags); + + if (pmu_mmdc->mmdc_events[cfg] != NULL) + return -EAGAIN; + + pmu_mmdc->mmdc_events[cfg] = event; + pmu_mmdc->active_events++; + + local64_set(&hwc->prev_count, mmdc_pmu_read_counter(pmu_mmdc, cfg)); + + return 0; +} + +static void mmdc_pmu_event_stop(struct perf_event *event, int flags) +{ + struct mmdc_pmu *pmu_mmdc = to_mmdc_pmu(event->pmu); + void __iomem *mmdc_base, *reg; + + mmdc_base = pmu_mmdc->mmdc_base; + reg = mmdc_base + MMDC_MADPCR0; + + writel(PRF_FRZ, reg); + mmdc_pmu_event_update(event); +} + +static void mmdc_pmu_event_del(struct perf_event *event, int flags) +{ + struct mmdc_pmu *pmu_mmdc = to_mmdc_pmu(event->pmu); + int cfg = event->attr.config; + + pmu_mmdc->mmdc_events[cfg] = NULL; + pmu_mmdc->active_events--; + + if (pmu_mmdc->active_events == 0) + hrtimer_cancel(&pmu_mmdc->hrtimer); + + mmdc_pmu_event_stop(event, PERF_EF_UPDATE); +} + +static void mmdc_pmu_overflow_handler(struct mmdc_pmu *pmu_mmdc) +{ + int i; + + for (i = 0; i < MMDC_NUM_COUNTERS; i++) { + struct perf_event *event = pmu_mmdc->mmdc_events[i]; + + if (event) + mmdc_pmu_event_update(event); + } +} + +static enum hrtimer_restart mmdc_pmu_timer_handler(struct hrtimer *hrtimer) +{ + struct mmdc_pmu *pmu_mmdc = container_of(hrtimer, struct mmdc_pmu, + hrtimer); + + mmdc_pmu_overflow_handler(pmu_mmdc); + hrtimer_forward_now(hrtimer, mmdc_pmu_timer_period()); + + return HRTIMER_RESTART; +} + +static int mmdc_pmu_init(struct mmdc_pmu *pmu_mmdc, + void __iomem *mmdc_base, struct device *dev) +{ + int mmdc_num; + + *pmu_mmdc = (struct mmdc_pmu) { + .pmu = (struct pmu) { + .task_ctx_nr = perf_invalid_context, + .attr_groups = attr_groups, + .event_init = mmdc_pmu_event_init, + .add = mmdc_pmu_event_add, + .del = mmdc_pmu_event_del, + .start = mmdc_pmu_event_start, + .stop = mmdc_pmu_event_stop, + .read = mmdc_pmu_event_update, + }, + .mmdc_base = mmdc_base, + .dev = dev, + .active_events = 0, + }; + + mmdc_num = ida_simple_get(&mmdc_ida, 0, 0, GFP_KERNEL); + + return mmdc_num; +} + +static int imx_mmdc_remove(struct platform_device *pdev) +{ + struct mmdc_pmu *pmu_mmdc = platform_get_drvdata(pdev); + + perf_pmu_unregister(&pmu_mmdc->pmu); + cpuhp_remove_state_nocalls(CPUHP_ONLINE); + kfree(pmu_mmdc); + return 0; +} + +static int imx_mmdc_perf_init(struct platform_device *pdev, void __iomem *mmdc_base) +{ + struct mmdc_pmu *pmu_mmdc; + char *name; + int mmdc_num; + int ret; + + pmu_mmdc = kzalloc(sizeof(*pmu_mmdc), GFP_KERNEL); + if (!pmu_mmdc) { + pr_err("failed to allocate PMU device!\n"); + return -ENOMEM; + } + + mmdc_num = mmdc_pmu_init(pmu_mmdc, mmdc_base, &pdev->dev); + if (mmdc_num == 0) + name = "mmdc"; + else + name = devm_kasprintf(&pdev->dev, + GFP_KERNEL, "mmdc%d", mmdc_num); + + hrtimer_init(&pmu_mmdc->hrtimer, CLOCK_MONOTONIC, + HRTIMER_MODE_REL); + pmu_mmdc->hrtimer.function = mmdc_pmu_timer_handler; + + cpuhp_state_add_instance_nocalls(CPUHP_ONLINE, + &pmu_mmdc->node); + cpumask_set_cpu(smp_processor_id(), &pmu_mmdc->cpu); + ret = cpuhp_setup_state_multi(CPUHP_AP_NOTIFY_ONLINE, + "MMDC_ONLINE", NULL, + mmdc_pmu_offline_cpu); + if (ret) { + pr_err("cpuhp_setup_state_multi failure\n"); + goto pmu_register_err; + } + + ret = perf_pmu_register(&(pmu_mmdc->pmu), name, -1); + platform_set_drvdata(pdev, pmu_mmdc); + if (ret) + goto pmu_register_err; + return 0; + +pmu_register_err: + pr_warn("MMDC Perf PMU failed (%d), disabled\n", ret); + hrtimer_cancel(&pmu_mmdc->hrtimer); + kfree(pmu_mmdc); + return ret; +} + +#else +#define imx_mmdc_remove NULL +#define imx_mmdc_perf_init(pdev, mmdc_base) 0 +#endif + static int imx_mmdc_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -62,7 +516,7 @@ static int imx_mmdc_probe(struct platform_device *pdev) return -EBUSY; } - return 0; + return imx_mmdc_perf_init(pdev, mmdc_base); } int imx_mmdc_get_ddr_type(void) @@ -81,6 +535,7 @@ static struct platform_driver imx_mmdc_driver = { .of_match_table = imx_mmdc_dt_ids, }, .probe = imx_mmdc_probe, + .remove = imx_mmdc_remove, }; static int __init imx_mmdc_init(void) -- cgit v1.2.3 From ee1df783d15b2a1d7a06841c12105b1aa2ec513b Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Thu, 8 Sep 2016 06:00:08 +0300 Subject: ARM: lpc32xx: remove unused header file mach/irqs.h The removed LPC32xx mach/irqs.h file is not included in any source code, function declaration lpc32xx_init_irq() is also unused, remove them as leftovers after switching to a new interrupt controller driver. Signed-off-by: Vladimir Zapolskiy Acked-by: Arnd Bergmann Signed-off-by: Sylvain Lemieux --- arch/arm/mach-lpc32xx/common.h | 1 - arch/arm/mach-lpc32xx/include/mach/irqs.h | 117 ------------------------------ 2 files changed, 118 deletions(-) delete mode 100644 arch/arm/mach-lpc32xx/include/mach/irqs.h (limited to 'arch') diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h index 30c9e64fc65b..02575c2444e4 100644 --- a/arch/arm/mach-lpc32xx/common.h +++ b/arch/arm/mach-lpc32xx/common.h @@ -24,7 +24,6 @@ /* * Other arch specific structures and functions */ -extern void __init lpc32xx_init_irq(void); extern void __init lpc32xx_map_io(void); extern void __init lpc32xx_serial_init(void); diff --git a/arch/arm/mach-lpc32xx/include/mach/irqs.h b/arch/arm/mach-lpc32xx/include/mach/irqs.h deleted file mode 100644 index 00190535df90..000000000000 --- a/arch/arm/mach-lpc32xx/include/mach/irqs.h +++ /dev/null @@ -1,117 +0,0 @@ -/* - * arch/arm/mach-lpc32xx/include/mach/irqs.h - * - * Author: Kevin Wells - * - * Copyright (C) 2010 NXP Semiconductors - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARM_ARCH_IRQS_H -#define __ASM_ARM_ARCH_IRQS_H - -#define LPC32XX_SIC1_IRQ(n) (32 + (n)) -#define LPC32XX_SIC2_IRQ(n) (64 + (n)) - -/* - * MIC interrupts - */ -#define IRQ_LPC32XX_SUB1IRQ 0 -#define IRQ_LPC32XX_SUB2IRQ 1 -#define IRQ_LPC32XX_PWM3 3 -#define IRQ_LPC32XX_PWM4 4 -#define IRQ_LPC32XX_HSTIMER 5 -#define IRQ_LPC32XX_WATCH 6 -#define IRQ_LPC32XX_UART_IIR3 7 -#define IRQ_LPC32XX_UART_IIR4 8 -#define IRQ_LPC32XX_UART_IIR5 9 -#define IRQ_LPC32XX_UART_IIR6 10 -#define IRQ_LPC32XX_FLASH 11 -#define IRQ_LPC32XX_SD1 13 -#define IRQ_LPC32XX_LCD 14 -#define IRQ_LPC32XX_SD0 15 -#define IRQ_LPC32XX_TIMER0 16 -#define IRQ_LPC32XX_TIMER1 17 -#define IRQ_LPC32XX_TIMER2 18 -#define IRQ_LPC32XX_TIMER3 19 -#define IRQ_LPC32XX_SSP0 20 -#define IRQ_LPC32XX_SSP1 21 -#define IRQ_LPC32XX_I2S0 22 -#define IRQ_LPC32XX_I2S1 23 -#define IRQ_LPC32XX_UART_IIR7 24 -#define IRQ_LPC32XX_UART_IIR2 25 -#define IRQ_LPC32XX_UART_IIR1 26 -#define IRQ_LPC32XX_MSTIMER 27 -#define IRQ_LPC32XX_DMA 28 -#define IRQ_LPC32XX_ETHERNET 29 -#define IRQ_LPC32XX_SUB1FIQ 30 -#define IRQ_LPC32XX_SUB2FIQ 31 - -/* - * SIC1 interrupts start at offset 32 - */ -#define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1) -#define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2) -#define IRQ_LPC32XX_GPI_28 LPC32XX_SIC1_IRQ(4) -#define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6) -#define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7) -#define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8) -#define IRQ_LPC32XX_SPI2 LPC32XX_SIC1_IRQ(12) -#define IRQ_LPC32XX_PLLUSB LPC32XX_SIC1_IRQ(13) -#define IRQ_LPC32XX_PLLHCLK LPC32XX_SIC1_IRQ(14) -#define IRQ_LPC32XX_PLL397 LPC32XX_SIC1_IRQ(17) -#define IRQ_LPC32XX_I2C_2 LPC32XX_SIC1_IRQ(18) -#define IRQ_LPC32XX_I2C_1 LPC32XX_SIC1_IRQ(19) -#define IRQ_LPC32XX_RTC LPC32XX_SIC1_IRQ(20) -#define IRQ_LPC32XX_KEY LPC32XX_SIC1_IRQ(22) -#define IRQ_LPC32XX_SPI1 LPC32XX_SIC1_IRQ(23) -#define IRQ_LPC32XX_SW LPC32XX_SIC1_IRQ(24) -#define IRQ_LPC32XX_USB_OTG_TIMER LPC32XX_SIC1_IRQ(25) -#define IRQ_LPC32XX_USB_OTG_ATX LPC32XX_SIC1_IRQ(26) -#define IRQ_LPC32XX_USB_HOST LPC32XX_SIC1_IRQ(27) -#define IRQ_LPC32XX_USB_DEV_DMA LPC32XX_SIC1_IRQ(28) -#define IRQ_LPC32XX_USB_DEV_LP LPC32XX_SIC1_IRQ(29) -#define IRQ_LPC32XX_USB_DEV_HP LPC32XX_SIC1_IRQ(30) -#define IRQ_LPC32XX_USB_I2C LPC32XX_SIC1_IRQ(31) - -/* - * SIC2 interrupts start at offset 64 - */ -#define IRQ_LPC32XX_GPIO_00 LPC32XX_SIC2_IRQ(0) -#define IRQ_LPC32XX_GPIO_01 LPC32XX_SIC2_IRQ(1) -#define IRQ_LPC32XX_GPIO_02 LPC32XX_SIC2_IRQ(2) -#define IRQ_LPC32XX_GPIO_03 LPC32XX_SIC2_IRQ(3) -#define IRQ_LPC32XX_GPIO_04 LPC32XX_SIC2_IRQ(4) -#define IRQ_LPC32XX_GPIO_05 LPC32XX_SIC2_IRQ(5) -#define IRQ_LPC32XX_SPI2_DATAIN LPC32XX_SIC2_IRQ(6) -#define IRQ_LPC32XX_U2_HCTS LPC32XX_SIC2_IRQ(7) -#define IRQ_LPC32XX_P0_P1_IRQ LPC32XX_SIC2_IRQ(8) -#define IRQ_LPC32XX_GPI_08 LPC32XX_SIC2_IRQ(9) -#define IRQ_LPC32XX_GPI_09 LPC32XX_SIC2_IRQ(10) -#define IRQ_LPC32XX_GPI_19 LPC32XX_SIC2_IRQ(11) -#define IRQ_LPC32XX_U7_HCTS LPC32XX_SIC2_IRQ(12) -#define IRQ_LPC32XX_GPI_07 LPC32XX_SIC2_IRQ(15) -#define IRQ_LPC32XX_SDIO LPC32XX_SIC2_IRQ(18) -#define IRQ_LPC32XX_U5_RX LPC32XX_SIC2_IRQ(19) -#define IRQ_LPC32XX_SPI1_DATAIN LPC32XX_SIC2_IRQ(20) -#define IRQ_LPC32XX_GPI_00 LPC32XX_SIC2_IRQ(22) -#define IRQ_LPC32XX_GPI_01 LPC32XX_SIC2_IRQ(23) -#define IRQ_LPC32XX_GPI_02 LPC32XX_SIC2_IRQ(24) -#define IRQ_LPC32XX_GPI_03 LPC32XX_SIC2_IRQ(25) -#define IRQ_LPC32XX_GPI_04 LPC32XX_SIC2_IRQ(26) -#define IRQ_LPC32XX_GPI_05 LPC32XX_SIC2_IRQ(27) -#define IRQ_LPC32XX_GPI_06 LPC32XX_SIC2_IRQ(28) -#define IRQ_LPC32XX_SYSCLK LPC32XX_SIC2_IRQ(31) - -#define LPC32XX_NR_IRQS 96 - -#endif -- cgit v1.2.3 From d1193df9c3cbce699d07c352bb3c055cd827db4d Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Thu, 8 Sep 2016 06:00:09 +0300 Subject: ARM: lpc32xx: remove unused header file clock.h The removed clock.h file is a leftover after moving the platform to a common clock framework driver, it contains unused "struct clk" definition, which under circumstances may coalesce with a generic "struct clk" declaration for clock consumers. Also remove useless include of the removed local file from a single source file mach-lpc32xx/pm.c. Signed-off-by: Vladimir Zapolskiy Signed-off-by: Sylvain Lemieux --- arch/arm/mach-lpc32xx/clock.h | 38 -------------------------------------- arch/arm/mach-lpc32xx/pm.c | 1 - 2 files changed, 39 deletions(-) delete mode 100644 arch/arm/mach-lpc32xx/clock.h (limited to 'arch') diff --git a/arch/arm/mach-lpc32xx/clock.h b/arch/arm/mach-lpc32xx/clock.h deleted file mode 100644 index c0a8434307f7..000000000000 --- a/arch/arm/mach-lpc32xx/clock.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * arch/arm/mach-lpc32xx/clock.h - * - * Author: Kevin Wells - * - * Copyright (C) 2010 NXP Semiconductors - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __LPC32XX_CLOCK_H -#define __LPC32XX_CLOCK_H - -struct clk { - struct list_head node; - struct clk *parent; - u32 rate; - u32 usecount; - - int (*set_rate) (struct clk *, unsigned long); - unsigned long (*round_rate) (struct clk *, unsigned long); - unsigned long (*get_rate) (struct clk *clk); - int (*enable) (struct clk *, int); - - /* Register address and bit mask for simple clocks */ - void __iomem *enable_reg; - u32 enable_mask; -}; - -#endif diff --git a/arch/arm/mach-lpc32xx/pm.c b/arch/arm/mach-lpc32xx/pm.c index 207e81275ff0..62471570d586 100644 --- a/arch/arm/mach-lpc32xx/pm.c +++ b/arch/arm/mach-lpc32xx/pm.c @@ -73,7 +73,6 @@ #include #include #include "common.h" -#include "clock.h" #define TEMP_IRAM_AREA IO_ADDRESS(LPC32XX_IRAM_BASE) -- cgit v1.2.3 From 7dcdfef19a4388d921bb671662f04e3f6e4e2d92 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Wed, 28 Sep 2016 13:35:27 +0300 Subject: ARM: davinci: devices-da8xx: Remove DMA resources for MMC and SPI The drivers are now converted to not use the DMA resource. Signed-off-by: Peter Ujfalusi Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/devices-da8xx.c | 29 ----------------------------- 1 file changed, 29 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index add3771d38f6..dbdfe02b4174 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -57,15 +57,6 @@ #define DA8XX_EMAC_RAM_OFFSET 0x0000 #define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K -#define DA8XX_DMA_SPI0_RX EDMA_CTLR_CHAN(0, 14) -#define DA8XX_DMA_SPI0_TX EDMA_CTLR_CHAN(0, 15) -#define DA8XX_DMA_MMCSD0_RX EDMA_CTLR_CHAN(0, 16) -#define DA8XX_DMA_MMCSD0_TX EDMA_CTLR_CHAN(0, 17) -#define DA8XX_DMA_SPI1_RX EDMA_CTLR_CHAN(0, 18) -#define DA8XX_DMA_SPI1_TX EDMA_CTLR_CHAN(0, 19) -#define DA850_DMA_MMCSD1_RX EDMA_CTLR_CHAN(1, 28) -#define DA850_DMA_MMCSD1_TX EDMA_CTLR_CHAN(1, 29) - void __iomem *da8xx_syscfg0_base; void __iomem *da8xx_syscfg1_base; @@ -964,16 +955,6 @@ static struct resource da8xx_spi0_resources[] = { .end = IRQ_DA8XX_SPINT0, .flags = IORESOURCE_IRQ, }, - [2] = { - .start = DA8XX_DMA_SPI0_RX, - .end = DA8XX_DMA_SPI0_RX, - .flags = IORESOURCE_DMA, - }, - [3] = { - .start = DA8XX_DMA_SPI0_TX, - .end = DA8XX_DMA_SPI0_TX, - .flags = IORESOURCE_DMA, - }, }; static struct resource da8xx_spi1_resources[] = { @@ -987,16 +968,6 @@ static struct resource da8xx_spi1_resources[] = { .end = IRQ_DA8XX_SPINT1, .flags = IORESOURCE_IRQ, }, - [2] = { - .start = DA8XX_DMA_SPI1_RX, - .end = DA8XX_DMA_SPI1_RX, - .flags = IORESOURCE_DMA, - }, - [3] = { - .start = DA8XX_DMA_SPI1_TX, - .end = DA8XX_DMA_SPI1_TX, - .flags = IORESOURCE_DMA, - }, }; static struct davinci_spi_platform_data da8xx_spi_pdata[] = { -- cgit v1.2.3 From 638671053c6669b65135bc17eff0f654c5eb48a6 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Wed, 28 Sep 2016 13:35:28 +0300 Subject: ARM: davinci: devices: Remove DMA resources for MMC The driver is converted to not use the DMA resource. Signed-off-by: Peter Ujfalusi Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/devices.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c index 67d26c5bda0b..3ae70f2909b0 100644 --- a/arch/arm/mach-davinci/devices.c +++ b/arch/arm/mach-davinci/devices.c @@ -36,9 +36,6 @@ #define DM365_MMCSD0_BASE 0x01D11000 #define DM365_MMCSD1_BASE 0x01D00000 -#define DAVINCI_DMA_MMCRXEVT 26 -#define DAVINCI_DMA_MMCTXEVT 27 - void __iomem *davinci_sysmod_base; void davinci_map_sysmod(void) -- cgit v1.2.3 From 0dc68bc0840e6772a29e0066abf8914e75856d57 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Wed, 28 Sep 2016 13:35:29 +0300 Subject: ARM: davinci: dm355: Remove DMA resources for SPI The driver is converted to not use the DMA resource. Signed-off-by: Peter Ujfalusi Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/dm355.c | 8 -------- 1 file changed, 8 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index d33322ddedab..bd50367f654e 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -397,14 +397,6 @@ static struct resource dm355_spi0_resources[] = { .start = IRQ_DM355_SPINT0_0, .flags = IORESOURCE_IRQ, }, - { - .start = 17, - .flags = IORESOURCE_DMA, - }, - { - .start = 16, - .flags = IORESOURCE_DMA, - }, }; static struct davinci_spi_platform_data dm355_spi0_pdata = { -- cgit v1.2.3 From fc89017c83b77dd50da2ce893184483a7718f353 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Wed, 28 Sep 2016 13:35:30 +0300 Subject: ARM: davinci: dm365: Remove DMA resources for SPI The driver is converted to not use the DMA resource. Signed-off-by: Peter Ujfalusi Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/dm365.c | 8 -------- 1 file changed, 8 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index ef3add999263..8be04ec95adf 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -660,14 +660,6 @@ static struct resource dm365_spi0_resources[] = { .start = IRQ_DM365_SPIINT0_0, .flags = IORESOURCE_IRQ, }, - { - .start = 17, - .flags = IORESOURCE_DMA, - }, - { - .start = 16, - .flags = IORESOURCE_DMA, - }, }; static struct platform_device dm365_spi0_device = { -- cgit v1.2.3 From 4ebfcdee815a03dec62d79184e51fe1397439f76 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Fri, 23 Sep 2016 22:30:52 +0200 Subject: ARM: pxa: mioa701: use the new pxa_camera platform_data pxa_camera has transitioned from a soc_camera driver to a standalone v4l2 driver. Amend the device declaration accordingly. Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/mioa701.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index 38a96a193dc4..8a5d0491e73c 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c @@ -57,7 +57,6 @@ #include #include #include -#include #include "mioa701.h" @@ -627,6 +626,8 @@ struct pxacamera_platform_data mioa701_pxacamera_platform_data = { .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, .mclk_10khz = 5000, + .sensor_i2c_adapter_id = 0, + .sensor_i2c_address = 0x5d, }; static struct i2c_board_info __initdata mioa701_pi2c_devices[] = { @@ -643,12 +644,6 @@ static struct i2c_board_info mioa701_i2c_devices[] = { }, }; -static struct soc_camera_link iclink = { - .bus_id = 0, /* Match id in pxa27x_device_camera in device.c */ - .board_info = &mioa701_i2c_devices[0], - .i2c_adapter_id = 0, -}; - struct i2c_pxa_platform_data i2c_pdata = { .fast_mode = 1, }; @@ -684,7 +679,6 @@ MIO_SIMPLE_DEV(mioa701_sound, "mioa701-wm9713", NULL) MIO_SIMPLE_DEV(mioa701_board, "mioa701-board", NULL) MIO_SIMPLE_DEV(wm9713_acodec, "wm9713-codec", NULL); MIO_SIMPLE_DEV(gpio_vbus, "gpio-vbus", &gpio_vbus_data); -MIO_SIMPLE_DEV(mioa701_camera, "soc-camera-pdrv",&iclink); static struct platform_device *devices[] __initdata = { &mioa701_gpio_keys, @@ -696,7 +690,6 @@ static struct platform_device *devices[] __initdata = { &power_dev, &docg3, &gpio_vbus, - &mioa701_camera, &mioa701_board, }; @@ -761,6 +754,7 @@ static void __init mioa701_machine_init(void) platform_add_devices(devices, ARRAY_SIZE(devices)); gsm_init(); + i2c_register_board_info(0, ARRAY_AND_SIZE(mioa701_i2c_devices)); i2c_register_board_info(1, ARRAY_AND_SIZE(mioa701_pi2c_devices)); pxa_set_i2c_info(&i2c_pdata); pxa27x_set_i2c_power_info(NULL); @@ -769,6 +763,7 @@ static void __init mioa701_machine_init(void) regulator_register_always_on(0, "fixed-5.0V", fixed_5v0_consumers, ARRAY_SIZE(fixed_5v0_consumers), 5000000); + regulator_has_full_constraints(); } static void mioa701_machine_exit(void) -- cgit v1.2.3 From 6c1b417adc8faa940a6b9a608f999df9a5ccc42d Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Fri, 23 Sep 2016 22:30:53 +0200 Subject: ARM: pxa: ezx: use the new pxa_camera platform_data pxa_camera has transitioned from a soc_camera driver to a standalone v4l2 driver. Amend the device declaration accordingly. Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/ezx.c | 176 ++++++++++++++++++++---------------------------- 1 file changed, 72 insertions(+), 104 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c index 34ad0a89d4a9..0b8300e6fca3 100644 --- a/arch/arm/mach-pxa/ezx.c +++ b/arch/arm/mach-pxa/ezx.c @@ -17,14 +17,14 @@ #include #include #include +#include +#include #include #include #include #include #include -#include - #include #include #include @@ -723,6 +723,42 @@ static struct platform_device a780_gpio_keys = { }; /* camera */ +static struct regulator_consumer_supply camera_dummy_supplies[] = { + REGULATOR_SUPPLY("vdd", "0-005d"), +}; + +static struct regulator_init_data camera_dummy_initdata = { + .consumer_supplies = camera_dummy_supplies, + .num_consumer_supplies = ARRAY_SIZE(camera_dummy_supplies), + .constraints = { + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, +}; + +static struct fixed_voltage_config camera_dummy_config = { + .supply_name = "camera_vdd", + .microvolts = 2800000, + .gpio = GPIO50_nCAM_EN, + .enable_high = 0, + .init_data = &camera_dummy_initdata, +}; + +static struct platform_device camera_supply_dummy_device = { + .name = "reg-fixed-voltage", + .id = 1, + .dev = { + .platform_data = &camera_dummy_config, + }, +}; +static int a780_camera_reset(struct device *dev) +{ + gpio_set_value(GPIO19_GEN1_CAM_RST, 0); + msleep(10); + gpio_set_value(GPIO19_GEN1_CAM_RST, 1); + + return 0; +} + static int a780_camera_init(void) { int err; @@ -731,73 +767,36 @@ static int a780_camera_init(void) * GPIO50_nCAM_EN is active low * GPIO19_GEN1_CAM_RST is active on rising edge */ - err = gpio_request(GPIO50_nCAM_EN, "nCAM_EN"); - if (err) { - pr_err("%s: Failed to request nCAM_EN\n", __func__); - goto fail; - } - err = gpio_request(GPIO19_GEN1_CAM_RST, "CAM_RST"); if (err) { pr_err("%s: Failed to request CAM_RST\n", __func__); - goto fail_gpio_cam_rst; + return err; } - gpio_direction_output(GPIO50_nCAM_EN, 1); gpio_direction_output(GPIO19_GEN1_CAM_RST, 0); - - return 0; - -fail_gpio_cam_rst: - gpio_free(GPIO50_nCAM_EN); -fail: - return err; -} - -static int a780_camera_power(struct device *dev, int on) -{ - gpio_set_value(GPIO50_nCAM_EN, !on); - return 0; -} - -static int a780_camera_reset(struct device *dev) -{ - gpio_set_value(GPIO19_GEN1_CAM_RST, 0); - msleep(10); - gpio_set_value(GPIO19_GEN1_CAM_RST, 1); + a780_camera_reset(NULL); return 0; } struct pxacamera_platform_data a780_pxacamera_platform_data = { .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | - PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, + PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN | + PXA_CAMERA_PCP, .mclk_10khz = 5000, + .sensor_i2c_adapter_id = 0, + .sensor_i2c_address = 0x5d, }; -static struct i2c_board_info a780_camera_i2c_board_info = { - I2C_BOARD_INFO("mt9m111", 0x5d), -}; - -static struct soc_camera_link a780_iclink = { - .bus_id = 0, - .flags = SOCAM_SENSOR_INVERT_PCLK, - .i2c_adapter_id = 0, - .board_info = &a780_camera_i2c_board_info, - .power = a780_camera_power, - .reset = a780_camera_reset, -}; - -static struct platform_device a780_camera = { - .name = "soc-camera-pdrv", - .id = 0, - .dev = { - .platform_data = &a780_iclink, +static struct i2c_board_info a780_i2c_board_info[] = { + { + I2C_BOARD_INFO("mt9m111", 0x5d), }, }; static struct platform_device *a780_devices[] __initdata = { &a780_gpio_keys, + &camera_supply_dummy_device, }; static void __init a780_init(void) @@ -811,19 +810,19 @@ static void __init a780_init(void) pxa_set_stuart_info(NULL); pxa_set_i2c_info(NULL); + i2c_register_board_info(0, ARRAY_AND_SIZE(a780_i2c_board_info)); pxa_set_fb_info(NULL, &ezx_fb_info_1); pxa_set_keypad_info(&a780_keypad_platform_data); - if (a780_camera_init() == 0) { + if (a780_camera_init() == 0) pxa_set_camera_info(&a780_pxacamera_platform_data); - platform_device_register(&a780_camera); - } pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup)); platform_add_devices(ARRAY_AND_SIZE(ezx_devices)); platform_add_devices(ARRAY_AND_SIZE(a780_devices)); + regulator_has_full_constraints(); } MACHINE_START(EZX_A780, "Motorola EZX A780") @@ -1001,6 +1000,15 @@ static struct platform_device a910_gpio_keys = { }; /* camera */ +static int a910_camera_reset(struct device *dev) +{ + gpio_set_value(GPIO28_GEN2_CAM_RST, 0); + msleep(10); + gpio_set_value(GPIO28_GEN2_CAM_RST, 1); + + return 0; +} + static int a910_camera_init(void) { int err; @@ -1009,68 +1017,25 @@ static int a910_camera_init(void) * GPIO50_nCAM_EN is active low * GPIO28_GEN2_CAM_RST is active on rising edge */ - err = gpio_request(GPIO50_nCAM_EN, "nCAM_EN"); - if (err) { - pr_err("%s: Failed to request nCAM_EN\n", __func__); - goto fail; - } - err = gpio_request(GPIO28_GEN2_CAM_RST, "CAM_RST"); if (err) { pr_err("%s: Failed to request CAM_RST\n", __func__); - goto fail_gpio_cam_rst; + return err; } - gpio_direction_output(GPIO50_nCAM_EN, 1); gpio_direction_output(GPIO28_GEN2_CAM_RST, 0); - - return 0; - -fail_gpio_cam_rst: - gpio_free(GPIO50_nCAM_EN); -fail: - return err; -} - -static int a910_camera_power(struct device *dev, int on) -{ - gpio_set_value(GPIO50_nCAM_EN, !on); - return 0; -} - -static int a910_camera_reset(struct device *dev) -{ - gpio_set_value(GPIO28_GEN2_CAM_RST, 0); - msleep(10); - gpio_set_value(GPIO28_GEN2_CAM_RST, 1); + a910_camera_reset(NULL); return 0; } struct pxacamera_platform_data a910_pxacamera_platform_data = { .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | - PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, + PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN | + PXA_CAMERA_PCP, .mclk_10khz = 5000, -}; - -static struct i2c_board_info a910_camera_i2c_board_info = { - I2C_BOARD_INFO("mt9m111", 0x5d), -}; - -static struct soc_camera_link a910_iclink = { - .bus_id = 0, - .i2c_adapter_id = 0, - .board_info = &a910_camera_i2c_board_info, - .power = a910_camera_power, - .reset = a910_camera_reset, -}; - -static struct platform_device a910_camera = { - .name = "soc-camera-pdrv", - .id = 0, - .dev = { - .platform_data = &a910_iclink, - }, + .sensor_i2c_adapter_id = 0, + .sensor_i2c_address = 0x5d, }; /* leds-lp3944 */ @@ -1122,10 +1087,14 @@ static struct i2c_board_info __initdata a910_i2c_board_info[] = { I2C_BOARD_INFO("lp3944", 0x60), .platform_data = &a910_lp3944_leds, }, + { + I2C_BOARD_INFO("mt9m111", 0x5d), + }, }; static struct platform_device *a910_devices[] __initdata = { &a910_gpio_keys, + &camera_supply_dummy_device, }; static void __init a910_init(void) @@ -1145,14 +1114,13 @@ static void __init a910_init(void) pxa_set_keypad_info(&a910_keypad_platform_data); - if (a910_camera_init() == 0) { + if (a910_camera_init() == 0) pxa_set_camera_info(&a910_pxacamera_platform_data); - platform_device_register(&a910_camera); - } pwm_add_table(ezx_pwm_lookup, ARRAY_SIZE(ezx_pwm_lookup)); platform_add_devices(ARRAY_AND_SIZE(ezx_devices)); platform_add_devices(ARRAY_AND_SIZE(a910_devices)); + regulator_has_full_constraints(); } MACHINE_START(EZX_A910, "Motorola EZX A910") -- cgit v1.2.3 From d9fa04725f27ffe5c4964eb53fa8903ecbf56008 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Fri, 23 Sep 2016 22:30:54 +0200 Subject: ARM: pxa: em-x270: use the new pxa_camera platform_data pxa_camera has transitioned from a soc_camera driver to a standalone v4l2 driver. Amend the device declaration accordingly. Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/em-x270.c | 89 +++++++++++++++------------------------------ 1 file changed, 29 insertions(+), 60 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index 03354c21e1f2..811a7317f3ea 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -34,8 +35,6 @@ #include #include -#include - #include #include @@ -958,8 +957,6 @@ static inline void em_x270_init_gpio_keys(void) {} /* Quick Capture Interface and sensor setup */ #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE) -static struct regulator *em_x270_camera_ldo; - static int em_x270_sensor_init(void) { int ret; @@ -969,81 +966,53 @@ static int em_x270_sensor_init(void) return ret; gpio_direction_output(cam_reset, 0); - - em_x270_camera_ldo = regulator_get(NULL, "vcc cam"); - if (em_x270_camera_ldo == NULL) { - gpio_free(cam_reset); - return -ENODEV; - } - - ret = regulator_enable(em_x270_camera_ldo); - if (ret) { - regulator_put(em_x270_camera_ldo); - gpio_free(cam_reset); - return ret; - } - gpio_set_value(cam_reset, 1); return 0; } -struct pxacamera_platform_data em_x270_camera_platform_data = { - .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | - PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, - .mclk_10khz = 2600, +static struct regulator_consumer_supply camera_dummy_supplies[] = { + REGULATOR_SUPPLY("vdd", "0-005d"), }; -static int em_x270_sensor_power(struct device *dev, int on) -{ - int ret; - int is_on = regulator_is_enabled(em_x270_camera_ldo); - - if (on == is_on) - return 0; - - gpio_set_value(cam_reset, !on); - - if (on) - ret = regulator_enable(em_x270_camera_ldo); - else - ret = regulator_disable(em_x270_camera_ldo); - - if (ret) - return ret; - - gpio_set_value(cam_reset, on); - - return 0; -} - -static struct i2c_board_info em_x270_i2c_cam_info[] = { - { - I2C_BOARD_INFO("mt9m111", 0x48), +static struct regulator_init_data camera_dummy_initdata = { + .consumer_supplies = camera_dummy_supplies, + .num_consumer_supplies = ARRAY_SIZE(camera_dummy_supplies), + .constraints = { + .valid_ops_mask = REGULATOR_CHANGE_STATUS, }, }; -static struct soc_camera_link iclink = { - .bus_id = 0, - .power = em_x270_sensor_power, - .board_info = &em_x270_i2c_cam_info[0], - .i2c_adapter_id = 0, +static struct fixed_voltage_config camera_dummy_config = { + .supply_name = "camera_vdd", + .input_supply = "vcc cam", + .microvolts = 2800000, + .gpio = -1, + .enable_high = 0, + .init_data = &camera_dummy_initdata, }; -static struct platform_device em_x270_camera = { - .name = "soc-camera-pdrv", - .id = -1, +static struct platform_device camera_supply_dummy_device = { + .name = "reg-fixed-voltage", + .id = 1, .dev = { - .platform_data = &iclink, + .platform_data = &camera_dummy_config, }, }; +struct pxacamera_platform_data em_x270_camera_platform_data = { + .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | + PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN, + .mclk_10khz = 2600, + .sensor_i2c_adapter_id = 0, + .sensor_i2c_address = 0x5d, +}; + static void __init em_x270_init_camera(void) { - if (em_x270_sensor_init() == 0) { + if (em_x270_sensor_init() == 0) pxa_set_camera_info(&em_x270_camera_platform_data); - platform_device_register(&em_x270_camera); - } + platform_device_register(&camera_supply_dummy_device); } #else static inline void em_x270_init_camera(void) {} -- cgit v1.2.3 From 766763dbdc1dca11deabdb00077a1c19e2803f0a Mon Sep 17 00:00:00 2001 From: Alexandre Bailon Date: Thu, 27 Oct 2016 17:32:36 +0200 Subject: ARM: davinci: da8xx: Remove duplicated defines Some macro for DA8xx CFGCHIP are defined in usb-davinci.h, but da8xx-cfgchip.h intend to replace them. Remove duplicated defines between da8xx-cfgchip.h and usb-davinci.h Signed-off-by: Alexandre Bailon Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-da830-evm.c | 5 +++-- arch/arm/mach-davinci/board-omapl138-hawk.c | 3 ++- 2 files changed, 5 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 3d8cf8cbd98a..df1f4091a8ae 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -116,7 +117,7 @@ static __init void da830_evm_usb_init(void) cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); /* USB2.0 PHY reference clock is 24 MHz */ - cfgchip2 &= ~CFGCHIP2_REFFREQ; + cfgchip2 &= ~CFGCHIP2_REFFREQ_MASK; cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ; /* @@ -133,7 +134,7 @@ static __init void da830_evm_usb_init(void) * controller won't be able to drive VBUS thinking that it's a B-device. * Otherwise, we want to use the OTG mode and enable VBUS comparators. */ - cfgchip2 &= ~CFGCHIP2_OTGMODE; + cfgchip2 &= ~CFGCHIP2_OTGMODE_MASK; #ifdef CONFIG_USB_MUSB_HOST cfgchip2 |= CFGCHIP2_FORCE_HOST; #else diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index ee624861ca66..e1efa1066c1e 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -254,7 +255,7 @@ static __init void omapl138_hawk_usb_init(void) /* Setup the Ref. clock frequency for the HAWK at 24 MHz. */ cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); - cfgchip2 &= ~CFGCHIP2_REFFREQ; + cfgchip2 &= ~CFGCHIP2_REFFREQ_MASK; cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ; __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); -- cgit v1.2.3 From 0fcd54112a9f7902b05741ab493173ee71210458 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Tue, 25 Oct 2016 22:06:48 -0500 Subject: ARM: davinci: da8xx: Add CFGCHIP syscon platform device The CFGCHIP registers are used by a number of devices, so use a syscon device to share them. The first consumer of this will be the phy-da8xx-usb driver. Add the syscon device and register it. Signed-off-by: David Lechner [nsekhar@ti.com: minor commit message fixes] Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-da830-evm.c | 4 ++++ arch/arm/mach-davinci/board-da850-evm.c | 4 ++++ arch/arm/mach-davinci/board-mityomapl138.c | 4 ++++ arch/arm/mach-davinci/board-omapl138-hawk.c | 4 ++++ arch/arm/mach-davinci/devices-da8xx.c | 28 ++++++++++++++++++++++++++++ arch/arm/mach-davinci/include/mach/da8xx.h | 2 ++ 6 files changed, 46 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index df1f4091a8ae..8b9d9053a984 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -589,6 +589,10 @@ static __init void da830_evm_init(void) struct davinci_soc_info *soc_info = &davinci_soc_info; int ret; + ret = da8xx_register_cfgchip(); + if (ret) + pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret); + ret = da830_register_gpio(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index 8e4539f69fdc..ec5cb105e1d6 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -1345,6 +1345,10 @@ static __init void da850_evm_init(void) { int ret; + ret = da8xx_register_cfgchip(); + if (ret) + pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret); + ret = da850_register_gpio(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c index bc4e63fa9808..1a6d430742d4 100644 --- a/arch/arm/mach-davinci/board-mityomapl138.c +++ b/arch/arm/mach-davinci/board-mityomapl138.c @@ -514,6 +514,10 @@ static void __init mityomapl138_init(void) { int ret; + ret = da8xx_register_cfgchip(); + if (ret) + pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret); + /* for now, no special EDMA channels are reserved */ ret = da850_register_edma(NULL); if (ret) diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index e1efa1066c1e..a403ed9782c4 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -293,6 +293,10 @@ static __init void omapl138_hawk_init(void) { int ret; + ret = da8xx_register_cfgchip(); + if (ret) + pr_warn("%s: CFGCHIP registration failed: %d\n", __func__, ret); + ret = da850_register_gpio(); if (ret) pr_warn("%s: GPIO init failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index dbdfe02b4174..c2457b3fdb5f 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -11,6 +11,7 @@ * (at your option) any later version. */ #include +#include #include #include #include @@ -1060,3 +1061,30 @@ int __init da850_register_sata(unsigned long refclkpn) return platform_device_register(&da850_sata_device); } #endif + +static struct syscon_platform_data da8xx_cfgchip_platform_data = { + .label = "cfgchip", +}; + +static struct resource da8xx_cfgchip_resources[] = { + { + .start = DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP0_REG, + .end = DA8XX_SYSCFG0_BASE + DA8XX_CFGCHIP4_REG + 3, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device da8xx_cfgchip_device = { + .name = "syscon", + .id = -1, + .dev = { + .platform_data = &da8xx_cfgchip_platform_data, + }, + .num_resources = ARRAY_SIZE(da8xx_cfgchip_resources), + .resource = da8xx_cfgchip_resources, +}; + +int __init da8xx_register_cfgchip(void) +{ + return platform_device_register(&da8xx_cfgchip_device); +} diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index f9f9713aacdd..2f6fe2f0c733 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -61,6 +61,7 @@ extern unsigned int da850_max_speed; #define DA8XX_CFGCHIP1_REG 0x180 #define DA8XX_CFGCHIP2_REG 0x184 #define DA8XX_CFGCHIP3_REG 0x188 +#define DA8XX_CFGCHIP4_REG 0x18c #define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000) #define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x)) @@ -113,6 +114,7 @@ void da8xx_rproc_reserve_cma(void); int da8xx_register_rproc(void); int da850_register_gpio(void); int da830_register_gpio(void); +int da8xx_register_cfgchip(void); extern struct platform_device da8xx_serial_device[]; extern struct emac_platform_data da8xx_emac_pdata; -- cgit v1.2.3 From 40a17abc8b98440ba3c05254b57564a6db1a70b0 Mon Sep 17 00:00:00 2001 From: Axel Haslam Date: Wed, 26 Oct 2016 21:41:55 +0200 Subject: ARM: davinci: da8xx: Add full regulator constraints for non-DT boot The phy framework requests an optional "phy" regulator. If it does not find one, it returns -EPROBE_DEFER. In the case of non-DT boot for the omap138-lcdk board, this would prevent the usb11 phy to probe correctly and ohci would not enumerate. By calling regulator_has_full_constraints(), An error would be returned instead of -EPROBE_DEFER for the regulator, and the probe of the phy driver can continue normally without a regulator. Signed-off-by: Axel Haslam [nsekhar@ti.com: minor commit message updates] Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-da830-evm.c | 3 +++ arch/arm/mach-davinci/board-omapl138-hawk.c | 3 +++ 2 files changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 8b9d9053a984..6001b32305ec 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include @@ -652,6 +653,8 @@ static __init void da830_evm_init(void) ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info)); if (ret) pr_warn("%s: spi 0 registration failed: %d\n", __func__, ret); + + regulator_has_full_constraints(); } #ifdef CONFIG_SERIAL_8250_CONSOLE diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index a403ed9782c4..70ed5ef2ef8c 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -322,6 +323,8 @@ static __init void omapl138_hawk_init(void) if (ret) pr_warn("%s: dsp/rproc registration failed: %d\n", __func__, ret); + + regulator_has_full_constraints(); } #ifdef CONFIG_SERIAL_8250_CONSOLE -- cgit v1.2.3 From ec7cc27ed157a7323d08c31d73cada1dfe101642 Mon Sep 17 00:00:00 2001 From: Karl Beldan Date: Wed, 5 Oct 2016 15:05:31 +0200 Subject: ARM: davinci: da8xx-dt: add OF_DEV_AUXDATA entry for lcdc This is required for tilcdc to be able to acquire a functional clock on da850 SoCs. Signed-off-by: Karl Beldan [Bartosz: - added the commit description - changed the compatible string to 'ti,da850-tilcdc'] Signed-off-by: Bartosz Golaszewski Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/da8xx-dt.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c index c9f7e9274aa8..697da3d86563 100644 --- a/arch/arm/mach-davinci/da8xx-dt.c +++ b/arch/arm/mach-davinci/da8xx-dt.c @@ -38,6 +38,7 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = { NULL), OF_DEV_AUXDATA("ti,da830-mcasp-audio", 0x01d00000, "davinci-mcasp.0", NULL), OF_DEV_AUXDATA("ti,da850-aemif", 0x68000000, "ti-aemif", NULL), + OF_DEV_AUXDATA("ti,da850-tilcdc", 0x01e13000, "da8xx_lcdc.0", NULL), {} }; -- cgit v1.2.3 From 9b504750923cb71473cf55e0a3a594a39e57e268 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Wed, 26 Oct 2016 19:18:15 -0500 Subject: ARM: davinci: da8xx: Add USB PHY platform device There is now a proper phy driver for the DA8xx SoC USB PHY. This adds the platform device declarations needed to use it. Signed-off-by: David Lechner [nsekhar@ti.com: keep usb-davinci.h included in board-da830-evm.c minor subject line adjustment] Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-da830-evm.c | 21 +++++++-------------- arch/arm/mach-davinci/board-omapl138-hawk.c | 5 +++++ arch/arm/mach-davinci/include/mach/da8xx.h | 1 + arch/arm/mach-davinci/usb-da8xx.c | 11 +++++++++++ 4 files changed, 24 insertions(+), 14 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 6001b32305ec..53172add5248 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -112,7 +112,7 @@ static __init void da830_evm_usb_init(void) int ret; /* - * Set up USB clock/mode in the CFGCHIP2 register. + * Set up USB clock in the CFGCHIP2 register. * FYI: CFGCHIP2 is 0x0000ef00 initially. */ cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); @@ -129,22 +129,15 @@ static __init void da830_evm_usb_init(void) cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX; cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX; - /* - * We have to override VBUS/ID signals when MUSB is configured into the - * host-only mode -- ID pin will float if no cable is connected, so the - * controller won't be able to drive VBUS thinking that it's a B-device. - * Otherwise, we want to use the OTG mode and enable VBUS comparators. - */ - cfgchip2 &= ~CFGCHIP2_OTGMODE_MASK; -#ifdef CONFIG_USB_MUSB_HOST - cfgchip2 |= CFGCHIP2_FORCE_HOST; -#else - cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN; -#endif - __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); /* USB_REFCLKIN is not used. */ + + ret = da8xx_register_usb_phy(); + if (ret) + pr_warn("%s: USB PHY registration failed: %d\n", + __func__, ret); + ret = davinci_cfg_reg(DA830_USB0_DRVVBUS); if (ret) pr_warn("%s: USB 2.0 PinMux setup failed: %d\n", __func__, ret); diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index 70ed5ef2ef8c..67477ca4f15a 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -260,6 +260,11 @@ static __init void omapl138_hawk_usb_init(void) cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ; __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); + ret = da8xx_register_usb_phy(); + if (ret) + pr_warn("%s: USB PHY registration failed: %d\n", + __func__, ret); + ret = gpio_request_one(DA850_USB1_VBUS_PIN, GPIOF_DIR_OUT, "USB1 VBUS"); if (ret < 0) { diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 2f6fe2f0c733..5e07d06f60e4 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -89,6 +89,7 @@ int da850_register_edma(struct edma_rsv_info *rsv[2]); int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata); int da8xx_register_spi_bus(int instance, unsigned num_chipselect); int da8xx_register_watchdog(void); +int da8xx_register_usb_phy(void); int da8xx_register_usb20(unsigned mA, unsigned potpgt); int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata); int da8xx_register_emac(void); diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c index f141f5171906..4bb190380060 100644 --- a/arch/arm/mach-davinci/usb-da8xx.c +++ b/arch/arm/mach-davinci/usb-da8xx.c @@ -3,6 +3,7 @@ */ #include #include +#include #include #include #include @@ -15,6 +16,16 @@ #define DA8XX_USB0_BASE 0x01e00000 #define DA8XX_USB1_BASE 0x01e25000 +static struct platform_device da8xx_usb_phy = { + .name = "da8xx-usb-phy", + .id = -1, +}; + +int __init da8xx_register_usb_phy(void) +{ + return platform_device_register(&da8xx_usb_phy); +} + #if IS_ENABLED(CONFIG_USB_MUSB_HDRC) static struct musb_hdrc_config musb_config = { -- cgit v1.2.3 From b08157a1b650773ab446ae173c908f8c9abdb9a4 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Wed, 26 Oct 2016 19:18:16 -0500 Subject: ARM: davinci: da8xx: Add USB device names to clock lookup tables This adds device names for the SoC USB devices to the clock lookup tables in da830.c and da850.c. Also add the USB device names to the da850_auxdata_lookup[] table. Signed-off-by: David Lechner Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/da830.c | 4 ++-- arch/arm/mach-davinci/da850.c | 4 ++-- arch/arm/mach-davinci/da8xx-dt.c | 2 ++ 3 files changed, 6 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index 426fd7477357..41459bd91c85 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -412,7 +412,7 @@ static struct clk_lookup da830_clks[] = { CLK("davinci-mcasp.0", NULL, &mcasp0_clk), CLK("davinci-mcasp.1", NULL, &mcasp1_clk), CLK("davinci-mcasp.2", NULL, &mcasp2_clk), - CLK(NULL, "usb20", &usb20_clk), + CLK("musb-da8xx", "usb20", &usb20_clk), CLK(NULL, "aemif", &aemif_clk), CLK(NULL, "aintc", &aintc_clk), CLK(NULL, "secu_mgr", &secu_mgr_clk), @@ -420,7 +420,7 @@ static struct clk_lookup da830_clks[] = { CLK("davinci_mdio.0", "fck", &emac_clk), CLK(NULL, "gpio", &gpio_clk), CLK("i2c_davinci.2", NULL, &i2c1_clk), - CLK(NULL, "usb11", &usb11_clk), + CLK("ohci", "usb11", &usb11_clk), CLK(NULL, "emif3", &emif3_clk), CLK(NULL, "arm", &arm_clk), CLK(NULL, "rmii", &rmii_clk), diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index ed3d0e9f72ac..196e262b7147 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -503,8 +503,8 @@ static struct clk_lookup da850_clks[] = { CLK("da830-mmc.1", NULL, &mmcsd1_clk), CLK("ti-aemif", NULL, &aemif_clk), CLK(NULL, "aemif", &aemif_clk), - CLK(NULL, "usb11", &usb11_clk), - CLK(NULL, "usb20", &usb20_clk), + CLK("ohci", "usb11", &usb11_clk), + CLK("musb-da8xx", "usb20", &usb20_clk), CLK("spi_davinci.0", NULL, &spi0_clk), CLK("spi_davinci.1", NULL, &spi1_clk), CLK("vpif", NULL, &vpif_clk), diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c index 697da3d86563..0e45cbd57273 100644 --- a/arch/arm/mach-davinci/da8xx-dt.c +++ b/arch/arm/mach-davinci/da8xx-dt.c @@ -39,6 +39,8 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("ti,da830-mcasp-audio", 0x01d00000, "davinci-mcasp.0", NULL), OF_DEV_AUXDATA("ti,da850-aemif", 0x68000000, "ti-aemif", NULL), OF_DEV_AUXDATA("ti,da850-tilcdc", 0x01e13000, "da8xx_lcdc.0", NULL), + OF_DEV_AUXDATA("ti,da830-ohci", 0x01e25000, "ohci", NULL), + OF_DEV_AUXDATA("ti,da830-musb", 0x01e00000, "musb-da8xx", NULL), {} }; -- cgit v1.2.3 From 494975c9cc00f69bf71de0991dcebda9b2911aa0 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 19 Sep 2016 03:11:13 +0900 Subject: ARM: mediatek: clean up mach-mediatek/Makefile Kbuild descends into arch/arm/mach-mediatek/Makefile only when CONFIG_ARCH_MEDIATEK is enabled. So, obj-$(CONFIG_ARCH_MEDIATEK) is always equivalent to obj-y in this Makefile. Signed-off-by: Masahiro Yamada Signed-off-by: Matthias Brugger --- arch/arm/mach-mediatek/Makefile | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile index 21164605b83f..dadae67d79b7 100644 --- a/arch/arm/mach-mediatek/Makefile +++ b/arch/arm/mach-mediatek/Makefile @@ -1,4 +1,2 @@ -ifeq ($(CONFIG_SMP),y) -obj-$(CONFIG_ARCH_MEDIATEK) += platsmp.o -endif -obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o +obj-$(CONFIG_SMP) += platsmp.o +obj-y += mediatek.o -- cgit v1.2.3 From 3b996e5f8f4057b76eacae493a309215f3fd8485 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Mon, 31 Oct 2016 15:47:19 -0500 Subject: ARM: davinci: da8xx-dt: add OF_DEV_AUXDATA entry for USB phy Add OF_DEV_AUXDATA() entry for USB phy. This is required for so that clock lookup will work for the USB PHY driver. Signed-off-by: David Lechner Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/da8xx-dt.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c index 0e45cbd57273..5e67618180a7 100644 --- a/arch/arm/mach-davinci/da8xx-dt.c +++ b/arch/arm/mach-davinci/da8xx-dt.c @@ -41,6 +41,7 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("ti,da850-tilcdc", 0x01e13000, "da8xx_lcdc.0", NULL), OF_DEV_AUXDATA("ti,da830-ohci", 0x01e25000, "ohci", NULL), OF_DEV_AUXDATA("ti,da830-musb", 0x01e00000, "musb-da8xx", NULL), + OF_DEV_AUXDATA("ti,da830-usb-phy", 0x01c1417c, "da8xx-usb-phy", NULL), {} }; -- cgit v1.2.3 From 0004b02a6820e855788fc029b21d710b3c5fdfe0 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Mon, 31 Oct 2016 15:47:20 -0500 Subject: ARM: davinci: da8xx: add usb phy clocks Up to this point, the USB phy clock configuration was handled manually in the board files and in the usb drivers. This adds proper clocks so that the usb drivers can use clk_get and clk_enable and not have to worry about the details. Also, the related code is removed from the board files and replaced with the new clock registration functions. This also removes the #if IS_ENABLED(CONFIG_USB_MUSB_HDRC) around the musb declaration and renames the musb platform device so that we can reference it from the usb20 clock even if the musb device is not used. Signed-off-by: David Lechner Signed-off-by: Axel Haslam Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/board-da830-evm.c | 31 +--- arch/arm/mach-davinci/board-omapl138-hawk.c | 15 +- arch/arm/mach-davinci/include/mach/da8xx.h | 3 + arch/arm/mach-davinci/usb-da8xx.c | 267 ++++++++++++++++++++++++++-- 4 files changed, 274 insertions(+), 42 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 53172add5248..5db09014f55a 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include #include @@ -108,30 +107,18 @@ static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id) static __init void da830_evm_usb_init(void) { - u32 cfgchip2; int ret; - /* - * Set up USB clock in the CFGCHIP2 register. - * FYI: CFGCHIP2 is 0x0000ef00 initially. - */ - cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); - - /* USB2.0 PHY reference clock is 24 MHz */ - cfgchip2 &= ~CFGCHIP2_REFFREQ_MASK; - cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ; - - /* - * Select internal reference clock for USB 2.0 PHY - * and use it as a clock source for USB 1.1 PHY - * (this is the default setting anyway). - */ - cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX; - cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX; - - __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); - /* USB_REFCLKIN is not used. */ + ret = da8xx_register_usb20_phy_clk(false); + if (ret) + pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n", + __func__, ret); + + ret = da8xx_register_usb11_phy_clk(false); + if (ret) + pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n", + __func__, ret); ret = da8xx_register_usb_phy(); if (ret) diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index 67477ca4f15a..a4e87264ebd7 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include @@ -245,7 +244,6 @@ static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id) static __init void omapl138_hawk_usb_init(void) { int ret; - u32 cfgchip2; ret = davinci_cfg_reg_list(da850_hawk_usb11_pins); if (ret) { @@ -253,12 +251,15 @@ static __init void omapl138_hawk_usb_init(void) return; } - /* Setup the Ref. clock frequency for the HAWK at 24 MHz. */ + ret = da8xx_register_usb20_phy_clk(false); + if (ret) + pr_warn("%s: USB 2.0 PHY CLK registration failed: %d\n", + __func__, ret); - cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); - cfgchip2 &= ~CFGCHIP2_REFFREQ_MASK; - cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ; - __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); + ret = da8xx_register_usb11_phy_clk(false); + if (ret) + pr_warn("%s: USB 1.1 PHY CLK registration failed: %d\n", + __func__, ret); ret = da8xx_register_usb_phy(); if (ret) diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 5e07d06f60e4..43322be26bd5 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -92,6 +92,9 @@ int da8xx_register_watchdog(void); int da8xx_register_usb_phy(void); int da8xx_register_usb20(unsigned mA, unsigned potpgt); int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata); +int da8xx_register_usb_refclkin(int rate); +int da8xx_register_usb20_phy_clk(bool use_usb_refclkin); +int da8xx_register_usb11_phy_clk(bool use_usb_refclkin); int da8xx_register_emac(void); int da8xx_register_uio_pruss(void); int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata); diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c index 4bb190380060..b010e5f80c5f 100644 --- a/arch/arm/mach-davinci/usb-da8xx.c +++ b/arch/arm/mach-davinci/usb-da8xx.c @@ -1,24 +1,38 @@ /* * DA8xx USB */ +#include +#include #include #include +#include #include #include #include #include +#include #include #include #include #include +#include "clock.h" + #define DA8XX_USB0_BASE 0x01e00000 #define DA8XX_USB1_BASE 0x01e25000 static struct platform_device da8xx_usb_phy = { .name = "da8xx-usb-phy", .id = -1, + .dev = { + /* + * Setting init_name so that clock lookup will work in + * da8xx_register_usb11_phy_clk() even if this device is not + * registered yet. + */ + .init_name = "da8xx-usb-phy", + }, }; int __init da8xx_register_usb_phy(void) @@ -26,8 +40,6 @@ int __init da8xx_register_usb_phy(void) return platform_device_register(&da8xx_usb_phy); } -#if IS_ENABLED(CONFIG_USB_MUSB_HDRC) - static struct musb_hdrc_config musb_config = { .multipoint = true, .num_eps = 5, @@ -56,10 +68,15 @@ static struct resource da8xx_usb20_resources[] = { static u64 usb_dmamask = DMA_BIT_MASK(32); -static struct platform_device usb_dev = { +static struct platform_device da8xx_usb20_dev = { .name = "musb-da8xx", .id = -1, .dev = { + /* + * Setting init_name so that clock lookup will work in + * usb20_phy_clk_enable() even if this device is not registered. + */ + .init_name = "musb-da8xx", .platform_data = &usb_data, .dma_mask = &usb_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), @@ -73,18 +90,9 @@ int __init da8xx_register_usb20(unsigned int mA, unsigned int potpgt) usb_data.power = mA > 510 ? 255 : mA / 2; usb_data.potpgt = (potpgt + 1) / 2; - return platform_device_register(&usb_dev); -} - -#else - -int __init da8xx_register_usb20(unsigned int mA, unsigned int potpgt) -{ - return 0; + return platform_device_register(&da8xx_usb20_dev); } -#endif /* CONFIG_USB_MUSB_HDRC */ - static struct resource da8xx_usb11_resources[] = { [0] = { .start = DA8XX_USB1_BASE, @@ -116,3 +124,236 @@ int __init da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata) da8xx_usb11_device.dev.platform_data = pdata; return platform_device_register(&da8xx_usb11_device); } + +static struct clk usb_refclkin = { + .name = "usb_refclkin", + .set_rate = davinci_simple_set_rate, +}; + +static struct clk_lookup usb_refclkin_lookup = + CLK(NULL, "usb_refclkin", &usb_refclkin); + +/** + * da8xx_register_usb_refclkin - register USB_REFCLKIN clock + * + * @rate: The clock rate in Hz + * + * This clock is only needed if the board provides an external USB_REFCLKIN + * signal, in which case it will be used as the parent of usb20_phy_clk and/or + * usb11_phy_clk. + */ +int __init da8xx_register_usb_refclkin(int rate) +{ + int ret; + + usb_refclkin.rate = rate; + ret = clk_register(&usb_refclkin); + if (ret) + return ret; + + clkdev_add(&usb_refclkin_lookup); + + return 0; +} + +static void usb20_phy_clk_enable(struct clk *clk) +{ + struct clk *usb20_clk; + int err; + u32 val; + u32 timeout = 500000; /* 500 msec */ + + val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); + + usb20_clk = clk_get(&da8xx_usb20_dev.dev, "usb20"); + if (IS_ERR(usb20_clk)) { + pr_err("could not get usb20 clk: %ld\n", PTR_ERR(usb20_clk)); + return; + } + + /* The USB 2.O PLL requires that the USB 2.O PSC is enabled as well. */ + err = clk_prepare_enable(usb20_clk); + if (err) { + pr_err("failed to enable usb20 clk: %d\n", err); + clk_put(usb20_clk); + return; + } + + /* + * Turn on the USB 2.0 PHY, but just the PLL, and not OTG. The USB 1.1 + * host may use the PLL clock without USB 2.0 OTG being used. + */ + val &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN); + val |= CFGCHIP2_PHY_PLLON; + + writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); + + while (--timeout) { + val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); + if (val & CFGCHIP2_PHYCLKGD) + goto done; + udelay(1); + } + + pr_err("Timeout waiting for USB 2.0 PHY clock good\n"); +done: + clk_disable_unprepare(usb20_clk); + clk_put(usb20_clk); +} + +static void usb20_phy_clk_disable(struct clk *clk) +{ + u32 val; + + val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); + val |= CFGCHIP2_PHYPWRDN; + writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); +} + +static int usb20_phy_clk_set_parent(struct clk *clk, struct clk *parent) +{ + u32 val; + + val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); + + /* Set the mux depending on the parent clock. */ + if (parent == &usb_refclkin) { + val &= ~CFGCHIP2_USB2PHYCLKMUX; + } else if (strcmp(parent->name, "pll0_aux_clk") == 0) { + val |= CFGCHIP2_USB2PHYCLKMUX; + } else { + pr_err("Bad parent on USB 2.0 PHY clock\n"); + return -EINVAL; + } + + /* reference frequency also comes from parent clock */ + val &= ~CFGCHIP2_REFFREQ_MASK; + switch (clk_get_rate(parent)) { + case 12000000: + val |= CFGCHIP2_REFFREQ_12MHZ; + break; + case 13000000: + val |= CFGCHIP2_REFFREQ_13MHZ; + break; + case 19200000: + val |= CFGCHIP2_REFFREQ_19_2MHZ; + break; + case 20000000: + val |= CFGCHIP2_REFFREQ_20MHZ; + break; + case 24000000: + val |= CFGCHIP2_REFFREQ_24MHZ; + break; + case 26000000: + val |= CFGCHIP2_REFFREQ_26MHZ; + break; + case 38400000: + val |= CFGCHIP2_REFFREQ_38_4MHZ; + break; + case 40000000: + val |= CFGCHIP2_REFFREQ_40MHZ; + break; + case 48000000: + val |= CFGCHIP2_REFFREQ_48MHZ; + break; + default: + pr_err("Bad parent clock rate on USB 2.0 PHY clock\n"); + return -EINVAL; + } + + writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); + + return 0; +} + +static struct clk usb20_phy_clk = { + .name = "usb20_phy", + .clk_enable = usb20_phy_clk_enable, + .clk_disable = usb20_phy_clk_disable, + .set_parent = usb20_phy_clk_set_parent, +}; + +static struct clk_lookup usb20_phy_clk_lookup = + CLK("da8xx-usb-phy", "usb20_phy", &usb20_phy_clk); + +/** + * da8xx_register_usb20_phy_clk - register USB0PHYCLKMUX clock + * + * @use_usb_refclkin: Selects the parent clock - either "usb_refclkin" if true + * or "pll0_aux" if false. + */ +int __init da8xx_register_usb20_phy_clk(bool use_usb_refclkin) +{ + struct clk *parent; + int ret = 0; + + parent = clk_get(NULL, use_usb_refclkin ? "usb_refclkin" : "pll0_aux"); + if (IS_ERR(parent)) + return PTR_ERR(parent); + + usb20_phy_clk.parent = parent; + ret = clk_register(&usb20_phy_clk); + if (!ret) + clkdev_add(&usb20_phy_clk_lookup); + + clk_put(parent); + + return ret; +} + +static int usb11_phy_clk_set_parent(struct clk *clk, struct clk *parent) +{ + u32 val; + + val = readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); + + /* Set the USB 1.1 PHY clock mux based on the parent clock. */ + if (parent == &usb20_phy_clk) { + val &= ~CFGCHIP2_USB1PHYCLKMUX; + } else if (parent == &usb_refclkin) { + val |= CFGCHIP2_USB1PHYCLKMUX; + } else { + pr_err("Bad parent on USB 1.1 PHY clock\n"); + return -EINVAL; + } + + writel(val, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); + + return 0; +} + +static struct clk usb11_phy_clk = { + .name = "usb11_phy", + .set_parent = usb11_phy_clk_set_parent, +}; + +static struct clk_lookup usb11_phy_clk_lookup = + CLK("da8xx-usb-phy", "usb11_phy", &usb11_phy_clk); + +/** + * da8xx_register_usb11_phy_clk - register USB1PHYCLKMUX clock + * + * @use_usb_refclkin: Selects the parent clock - either "usb_refclkin" if true + * or "usb20_phy" if false. + */ +int __init da8xx_register_usb11_phy_clk(bool use_usb_refclkin) +{ + struct clk *parent; + int ret = 0; + + if (use_usb_refclkin) + parent = clk_get(NULL, "usb_refclkin"); + else + parent = clk_get(&da8xx_usb_phy.dev, "usb20_phy"); + if (IS_ERR(parent)) + return PTR_ERR(parent); + + usb11_phy_clk.parent = parent; + ret = clk_register(&usb11_phy_clk); + if (!ret) + clkdev_add(&usb11_phy_clk_lookup); + + clk_put(parent); + + return ret; +} -- cgit v1.2.3 From ced95ac0815501f47a6041548d70d8900400912d Mon Sep 17 00:00:00 2001 From: Axel Haslam Date: Mon, 31 Oct 2016 15:47:21 -0500 Subject: ARM: davinci: da8xx: register USB PHY clocks in the DT file The usb20_phy clock needs to be registered for the driver to be able to get and enable a clock. Currently the usb phy clocks are registered from board files, which will not be called during a device tree based boot. To be able to probe correctly usb form a device tree boot, register the usb phy clocks from the DT specific init. Unfortunately, davinci does not have proper clock support on device tree yet, so by registering the clock from the DT specific file we are forced to hardcode the parent clock, and cannot select refclkin as parent for any of the phy clocks of the da850 family. As none of the current da850 based boards currently in mainline use refclkin as source. I guess we can live with this limitation until clocks are correctly represented through CCF/device tree. Signed-off-by: Axel Haslam [Added error checking] Signed-off-by: David Lechner [nsekhar@ti.com: typo fixes in commit message] Signed-off-by: Sekhar Nori --- arch/arm/mach-davinci/da8xx-dt.c | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c index 5e67618180a7..92ae093a2120 100644 --- a/arch/arm/mach-davinci/da8xx-dt.c +++ b/arch/arm/mach-davinci/da8xx-dt.c @@ -49,6 +49,17 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = { static void __init da850_init_machine(void) { + int ret; + + ret = da8xx_register_usb20_phy_clk(false); + if (ret) + pr_warn("%s: registering USB 2.0 PHY clock failed: %d", + __func__, ret); + ret = da8xx_register_usb11_phy_clk(false); + if (ret) + pr_warn("%s: registering USB 1.1 PHY clock failed: %d", + __func__, ret); + of_platform_default_populate(NULL, da850_auxdata_lookup, NULL); } -- cgit v1.2.3 From e11fc795215eca872d8d64087568c28ba739f659 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Mon, 31 Oct 2016 10:52:17 +0100 Subject: ARM: shmobile: only call rcar_gen2_clocks_init() if present The RZ/G1M (r8a7743) uses the R-Car Gen2 core, but not the R-Car Gen2 clock driver. This is a harbinger of a transition for R-Car Gen2 SoCs. As the process to get all the required pieces in place is somewhat complex it seems useful to try to disentangle dependencies where possible. The approach here is to temporarily disable calling rcar_gen2_clocks_init() if no R-Car Gen2 SoC are configured and thus the symbol will not be present. Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/mach-shmobile/setup-rcar-gen2.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index afb9fdcd3d90..154e8051825a 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include #include #include #include @@ -130,7 +131,15 @@ void __init rcar_gen2_timer_init(void) iounmap(base); #endif /* CONFIG_ARM_ARCH_TIMER */ - rcar_gen2_clocks_init(mode); + if (IS_ENABLED(CONFIG_ARCH_R8A7790) || + IS_ENABLED(CONFIG_ARCH_R8A7791) || + IS_ENABLED(CONFIG_ARCH_R8A7792) || + IS_ENABLED(CONFIG_ARCH_R8A7793) || + IS_ENABLED(CONFIG_ARCH_R8A7794)) + rcar_gen2_clocks_init(mode); + else + of_clk_init(NULL); + clocksource_probe(); } -- cgit v1.2.3 From e920565a1cc4a352719b42ba5e83d952a9a26507 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Thu, 6 Oct 2016 00:37:08 +0300 Subject: ARM: shmobile: r8a7743: basic SoC support Add minimal support for the RZ/G1M (R8A7743) SoC. Based on the original (and large) patch by Dmitry Shifrin . Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Kconfig | 4 ++++ arch/arm/mach-shmobile/Makefile | 1 + arch/arm/mach-shmobile/setup-r8a7743.c | 34 ++++++++++++++++++++++++++++++++++ 3 files changed, 39 insertions(+) create mode 100644 arch/arm/mach-shmobile/setup-r8a7743.c (limited to 'arch') diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 84fd4e959147..c48be1d332ed 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -67,6 +67,10 @@ config ARCH_R8A7740 select ARCH_RMOBILE select RENESAS_INTC_IRQPIN +config ARCH_R8A7743 + bool "RZ/G1M (R8A77430)" + select ARCH_RCAR_GEN2 + config ARCH_R8A7778 bool "R-Car M1A (R8A77781)" select ARCH_RCAR_GEN1 diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 3fc48b02eb4f..332b84f8261f 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -9,6 +9,7 @@ obj-y := timer.o obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o +obj-$(CONFIG_ARCH_R8A7743) += setup-r8a7743.o obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o pm-r8a7779.o obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o diff --git a/arch/arm/mach-shmobile/setup-r8a7743.c b/arch/arm/mach-shmobile/setup-r8a7743.c new file mode 100644 index 000000000000..a7ecb82d219f --- /dev/null +++ b/arch/arm/mach-shmobile/setup-r8a7743.c @@ -0,0 +1,34 @@ +/* + * r8a7743 processor support + * + * Copyright (C) 2016 Cogent Embedded, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation; of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +#include + +#include "common.h" +#include "rcar-gen2.h" + +static const char * const r8a7743_boards_compat_dt[] __initconst = { + "renesas,r8a7743", + NULL, +}; + +DT_MACHINE_START(R8A7743_DT, "Generic R8A7743 (Flattened Device Tree)") + .init_early = shmobile_init_delay, + .init_time = rcar_gen2_timer_init, + .init_late = shmobile_init_late, + .reserve = rcar_gen2_reserve, + .dt_compat = r8a7743_boards_compat_dt, +MACHINE_END -- cgit v1.2.3 From a0c4e2ccb31540f8972d8f36d32ace6b30e88e0f Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Mon, 17 Oct 2016 16:59:04 +0300 Subject: ARM: shmobile: Consolidate R8A7743 and R8A779[234] machine definitions The four SoCs use identical machine operations, consolidate them into two machine definitions in a single file. Signed-off-by: Laurent Pinchart Tested-by: Simon Horman Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Makefile | 4 ---- arch/arm/mach-shmobile/setup-r8a7743.c | 34 ------------------------------- arch/arm/mach-shmobile/setup-r8a7792.c | 35 -------------------------------- arch/arm/mach-shmobile/setup-r8a7793.c | 33 ------------------------------ arch/arm/mach-shmobile/setup-r8a7794.c | 33 ------------------------------ arch/arm/mach-shmobile/setup-rcar-gen2.c | 33 ++++++++++++++++++++++++++++++ 6 files changed, 33 insertions(+), 139 deletions(-) delete mode 100644 arch/arm/mach-shmobile/setup-r8a7743.c delete mode 100644 arch/arm/mach-shmobile/setup-r8a7792.c delete mode 100644 arch/arm/mach-shmobile/setup-r8a7793.c delete mode 100644 arch/arm/mach-shmobile/setup-r8a7794.c (limited to 'arch') diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 332b84f8261f..64611a1b4276 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -9,14 +9,10 @@ obj-y := timer.o obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o -obj-$(CONFIG_ARCH_R8A7743) += setup-r8a7743.o obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o pm-r8a7779.o obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o -obj-$(CONFIG_ARCH_R8A7792) += setup-r8a7792.o -obj-$(CONFIG_ARCH_R8A7793) += setup-r8a7793.o -obj-$(CONFIG_ARCH_R8A7794) += setup-r8a7794.o obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o diff --git a/arch/arm/mach-shmobile/setup-r8a7743.c b/arch/arm/mach-shmobile/setup-r8a7743.c deleted file mode 100644 index a7ecb82d219f..000000000000 --- a/arch/arm/mach-shmobile/setup-r8a7743.c +++ /dev/null @@ -1,34 +0,0 @@ -/* - * r8a7743 processor support - * - * Copyright (C) 2016 Cogent Embedded, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation; of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include - -#include - -#include "common.h" -#include "rcar-gen2.h" - -static const char * const r8a7743_boards_compat_dt[] __initconst = { - "renesas,r8a7743", - NULL, -}; - -DT_MACHINE_START(R8A7743_DT, "Generic R8A7743 (Flattened Device Tree)") - .init_early = shmobile_init_delay, - .init_time = rcar_gen2_timer_init, - .init_late = shmobile_init_late, - .reserve = rcar_gen2_reserve, - .dt_compat = r8a7743_boards_compat_dt, -MACHINE_END diff --git a/arch/arm/mach-shmobile/setup-r8a7792.c b/arch/arm/mach-shmobile/setup-r8a7792.c deleted file mode 100644 index a0910395da09..000000000000 --- a/arch/arm/mach-shmobile/setup-r8a7792.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * r8a7792 processor support - * - * Copyright (C) 2014 Renesas Electronics Corporation - * Copyright (C) 2016 Cogent Embedded, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include - -#include - -#include "common.h" -#include "rcar-gen2.h" - -static const char * const r8a7792_boards_compat_dt[] __initconst = { - "renesas,r8a7792", - NULL, -}; - -DT_MACHINE_START(R8A7792_DT, "Generic R8A7792 (Flattened Device Tree)") - .init_early = shmobile_init_delay, - .init_late = shmobile_init_late, - .init_time = rcar_gen2_timer_init, - .reserve = rcar_gen2_reserve, - .dt_compat = r8a7792_boards_compat_dt, -MACHINE_END diff --git a/arch/arm/mach-shmobile/setup-r8a7793.c b/arch/arm/mach-shmobile/setup-r8a7793.c deleted file mode 100644 index 5fce87f7f254..000000000000 --- a/arch/arm/mach-shmobile/setup-r8a7793.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * r8a7793 processor support - * - * Copyright (C) 2015 Ulrich Hecht - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include - -#include "common.h" -#include "rcar-gen2.h" - -static const char * const r8a7793_boards_compat_dt[] __initconst = { - "renesas,r8a7793", - NULL, -}; - -DT_MACHINE_START(R8A7793_DT, "Generic R8A7793 (Flattened Device Tree)") - .init_early = shmobile_init_delay, - .init_time = rcar_gen2_timer_init, - .init_late = shmobile_init_late, - .reserve = rcar_gen2_reserve, - .dt_compat = r8a7793_boards_compat_dt, -MACHINE_END diff --git a/arch/arm/mach-shmobile/setup-r8a7794.c b/arch/arm/mach-shmobile/setup-r8a7794.c deleted file mode 100644 index d2b093033132..000000000000 --- a/arch/arm/mach-shmobile/setup-r8a7794.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * r8a7794 processor support - * - * Copyright (C) 2014 Renesas Electronics Corporation - * Copyright (C) 2014 Ulrich Hecht - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include "common.h" -#include "rcar-gen2.h" -#include - -static const char * const r8a7794_boards_compat_dt[] __initconst = { - "renesas,r8a7794", - NULL, -}; - -DT_MACHINE_START(R8A7794_DT, "Generic R8A7794 (Flattened Device Tree)") - .init_early = shmobile_init_delay, - .init_late = shmobile_init_late, - .init_time = rcar_gen2_timer_init, - .reserve = rcar_gen2_reserve, - .dt_compat = r8a7794_boards_compat_dt, -MACHINE_END diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index 154e8051825a..d6b4841e51a9 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include "common.h" #include "rcar-gen2.h" @@ -212,3 +213,35 @@ void __init rcar_gen2_reserve(void) } #endif } + +static const char * const rcar_gen2_boards_compat_dt[] __initconst = { + /* + * R8A7790 and R8A7791 can't be handled here as long as they need SMP + * initialization fallback. + */ + "renesas,r8a7792", + "renesas,r8a7793", + "renesas,r8a7794", + NULL, +}; + +DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)") + .init_early = shmobile_init_delay, + .init_late = shmobile_init_late, + .init_time = rcar_gen2_timer_init, + .reserve = rcar_gen2_reserve, + .dt_compat = rcar_gen2_boards_compat_dt, +MACHINE_END + +static const char * const rz_g1_boards_compat_dt[] __initconst = { + "renesas,r8a7743", + NULL, +}; + +DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)") + .init_early = shmobile_init_delay, + .init_late = shmobile_init_late, + .init_time = rcar_gen2_timer_init, + .reserve = rcar_gen2_reserve, + .dt_compat = rz_g1_boards_compat_dt, +MACHINE_END -- cgit v1.2.3 From f2131c543649caade98e5834ee3f45c75a73a6a8 Mon Sep 17 00:00:00 2001 From: Wei Yongjun Date: Sat, 29 Oct 2016 13:56:30 +0200 Subject: ARM: pxa: remove duplicated include from spitz.c This partially reverts commit 12beb346710b ("Merge tag 'pxa-fixes-v4.8' of https://github.com/rjarzmik/linux into randconfig-4.8"). This former patch introduced accidentally a double include of module.h. Signed-off-by: Wei Yongjun Acked-by: Paul Gortmaker [amended commit message and 2 comments] Signed-off-by: Robert Jarzmik --- arch/arm/mach-pxa/corgi.c | 1 - arch/arm/mach-pxa/spitz.c | 1 - 2 files changed, 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 10bfdb169366..183cd3446f25 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c @@ -35,7 +35,6 @@ #include #include #include -#include #include #include