From a253933e6a8609ef40bf296b8ad60892133636c8 Mon Sep 17 00:00:00 2001 From: Nithin Dabilpuram Date: Sun, 2 Dec 2018 18:17:46 +0530 Subject: octeontx2-af: Configure VLAN TPIDs Setup TPID's for vlan0 and vlan1 for Tx VLAN insertion offloads. Signed-off-by: Nithin Dabilpuram Signed-off-by: Jerin Jacob Signed-off-by: David S. Miller --- drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'drivers/net/ethernet/marvell') diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c index 43639665e737..88875ebbe10a 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c @@ -865,6 +865,13 @@ int rvu_mbox_handler_nix_lf_alloc(struct rvu *rvu, (u64)pfvf->nix_qints_ctx->iova); rvu_write64(rvu, blkaddr, NIX_AF_LFX_QINTS_CFG(nixlf), BIT_ULL(36)); + /* Setup VLANX TPID's. + * Use VLAN1 for 802.1Q + * and VLAN0 for 802.1AD. + */ + cfg = (0x8100ULL << 16) | 0x88A8ULL; + rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_CFG(nixlf), cfg); + /* Enable LMTST for this NIX LF */ rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_CFG2(nixlf), BIT_ULL(0)); -- cgit v1.2.3