From e88b815e011bcacb7066f1156ce390f6b0adc9df Mon Sep 17 00:00:00 2001 From: Xianglong Du Date: Wed, 3 Jul 2013 15:08:04 -0700 Subject: drivers/rtc/rtc-sirfsoc.c: add rtc drivers for CSR SiRFprimaII and SiRFatlasVI On CSR SiRFprimaII/atlasVI, there is a programmable 16-bit divider (RTC_DIV) that divides the input 32.768KHz clock to the frequency that users need (E.g. 1 Hz). The divided real-time clock will be used to drive a 32-bit counter (RTC_COUNTER) that provides users with the actual time. In each cycle of the divided real-time clock, there is a Hertz interrupt generated to the RISC. Users can also configure an alarm (RTC_ALARM). When RTC_COUNTER matches the alarm, there will be an alarm interrupt generated to the RISC. The system RTC can generate an alarm wake-up signal to notify the power controller to wake up from power saving mode. Signed-off-by: Xianglong Du Signed-off-by: Barry Song Cc: Jingoo Han Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/rtc/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/rtc/Makefile') diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 994a2fac8277..d3b4488f48f2 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -129,3 +129,4 @@ obj-$(CONFIG_RTC_DRV_VT8500) += rtc-vt8500.o obj-$(CONFIG_RTC_DRV_WM831X) += rtc-wm831x.o obj-$(CONFIG_RTC_DRV_WM8350) += rtc-wm8350.o obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o +obj-$(CONFIG_RTC_DRV_SIRFSOC) += rtc-sirfsoc.o -- cgit v1.2.3