From c6f82787a5a193a5c4c49ddaeb362d320efa5fba Mon Sep 17 00:00:00 2001 From: "Chuah, Kim Tatt" Date: Wed, 15 Jun 2016 13:44:11 +0800 Subject: dmaengine: hsu: Export hsu_dma_get_status() To allow other code to safely read DMA Channel Status Register (where the register attribute for Channel Error, Descriptor Time Out & Descriptor Done fields are read-clear), export hsu_dma_get_status(). hsu_dma_irq() is renamed to hsu_dma_do_irq() and requires Status Register value to be passed in. Signed-off-by: Chuah, Kim Tatt Acked-by: Andy Shevchenko Reviewed-by: Heikki Krogerus Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/8250/8250_mid.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) (limited to 'drivers/tty/serial/8250/8250_mid.c') diff --git a/drivers/tty/serial/8250/8250_mid.c b/drivers/tty/serial/8250/8250_mid.c index 86379a79a6a3..b218ff528df7 100644 --- a/drivers/tty/serial/8250/8250_mid.c +++ b/drivers/tty/serial/8250/8250_mid.c @@ -97,12 +97,24 @@ static int dnv_handle_irq(struct uart_port *p) { struct mid8250 *mid = p->private_data; unsigned int fisr = serial_port_in(p, INTEL_MID_UART_DNV_FISR); + u32 status; int ret = IRQ_NONE; - - if (fisr & BIT(2)) - ret |= hsu_dma_irq(&mid->dma_chip, 1); - if (fisr & BIT(1)) - ret |= hsu_dma_irq(&mid->dma_chip, 0); + int err; + + if (fisr & BIT(2)) { + err = hsu_dma_get_status(&mid->dma_chip, 1, &status); + if (err > 0) + ret |= IRQ_HANDLED; + else if (err == 0) + ret |= hsu_dma_do_irq(&mid->dma_chip, 1, status); + } + if (fisr & BIT(1)) { + err = hsu_dma_get_status(&mid->dma_chip, 0, &status); + if (err > 0) + ret |= IRQ_HANDLED; + else if (err == 0) + ret |= hsu_dma_do_irq(&mid->dma_chip, 0, status); + } if (fisr & BIT(0)) ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR)); return ret; -- cgit v1.2.3