From a9d747c7601d7fbb16658746395717be36b34ef3 Mon Sep 17 00:00:00 2001 From: Terje Bergstrom Date: Mon, 7 Nov 2011 09:02:54 +0200 Subject: video: tegra: host: Sync 3D wait base only on timeout Synchronize 3D wait base only when there is a timeout. Bug 886411 Reviewed-on: http://git-master/r/62656 (cherry picked from commit 1f660b9ea615331624dcf8a923e7779fa3bcd48a) Change-Id: I085342ae2d9808c1284d59222f968835bd469921 Reviewed-on: http://git-master/r/64060 Reviewed-by: Terje Bergstrom Tested-by: Terje Bergstrom Reviewed-by: Yu-Huan Hsu --- drivers/video/tegra/host/chip_support.h | 1 + drivers/video/tegra/host/nvhost_cdma.c | 2 +- drivers/video/tegra/host/t20/cdma_t20.c | 4 ++-- drivers/video/tegra/host/t20/channel_t20.c | 1 - drivers/video/tegra/host/t30/channel_t30.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'drivers/video/tegra/host') diff --git a/drivers/video/tegra/host/chip_support.h b/drivers/video/tegra/host/chip_support.h index e829394f2455..f545cc2346b5 100644 --- a/drivers/video/tegra/host/chip_support.h +++ b/drivers/video/tegra/host/chip_support.h @@ -81,6 +81,7 @@ struct nvhost_chip_support { void (*timeout_cpu_incr)(struct nvhost_cdma *, u32 getptr, u32 syncpt_incrs, + u32 syncval, u32 nr_slots); void (*timeout_pb_incr)(struct nvhost_cdma *, u32 getptr, diff --git a/drivers/video/tegra/host/nvhost_cdma.c b/drivers/video/tegra/host/nvhost_cdma.c index f320fada6a96..0fe0e18e65b5 100644 --- a/drivers/video/tegra/host/nvhost_cdma.c +++ b/drivers/video/tegra/host/nvhost_cdma.c @@ -540,7 +540,7 @@ void nvhost_cdma_update_sync_queue(struct nvhost_cdma *cdma, /* safe to use CPU to incr syncpts */ cdma_op(cdma).timeout_cpu_incr(cdma, first_get, - syncpt_incrs, nr_slots); + syncpt_incrs, sync[SQ_IDX_SYNCPT_VAL], nr_slots); syncpt_val += syncpt_incrs; sync = advance_next_entry(cdma, sync); } diff --git a/drivers/video/tegra/host/t20/cdma_t20.c b/drivers/video/tegra/host/t20/cdma_t20.c index eafaac9d6d54..22a08e80537b 100644 --- a/drivers/video/tegra/host/t20/cdma_t20.c +++ b/drivers/video/tegra/host/t20/cdma_t20.c @@ -282,7 +282,7 @@ static void t20_cdma_timeout_destroy(struct nvhost_cdma *cdma) * Increment timedout buffer's syncpt via CPU. */ static void t20_cdma_timeout_cpu_incr(struct nvhost_cdma *cdma, u32 getptr, - u32 syncpt_incrs, u32 nr_slots) + u32 syncpt_incrs, u32 syncval, u32 nr_slots) { struct nvhost_master *dev = cdma_to_dev(cdma); struct push_buffer *pb = &cdma->push_buffer; @@ -299,7 +299,7 @@ static void t20_cdma_timeout_cpu_incr(struct nvhost_cdma *cdma, u32 getptr, void __iomem *p; p = dev->sync_aperture + HOST1X_SYNC_SYNCPT_BASE_0 + (NVWAITBASE_3D * sizeof(u32)); - writel(readl(p) + syncpt_incrs, p); + writel(syncval, p); } /* NOP all the PB slots */ diff --git a/drivers/video/tegra/host/t20/channel_t20.c b/drivers/video/tegra/host/t20/channel_t20.c index 851995fc133a..89ede089be9c 100644 --- a/drivers/video/tegra/host/t20/channel_t20.c +++ b/drivers/video/tegra/host/t20/channel_t20.c @@ -69,7 +69,6 @@ const struct nvhost_channeldesc nvhost_t20_channelmap[] = { .syncpts = BIT(NVSYNCPT_3D), .waitbases = BIT(NVWAITBASE_3D), .modulemutexes = BIT(NVMODMUTEX_3D), - .waitbasesync = true, .class = NV_GRAPHICS_3D_CLASS_ID, .module = { .prepare_poweroff = power_off_3d, diff --git a/drivers/video/tegra/host/t30/channel_t30.c b/drivers/video/tegra/host/t30/channel_t30.c index 985ecf29fc43..84c9e71c1b46 100644 --- a/drivers/video/tegra/host/t30/channel_t30.c +++ b/drivers/video/tegra/host/t30/channel_t30.c @@ -68,7 +68,7 @@ const struct nvhost_channeldesc nvhost_t30_channelmap[] = { .waitbases = BIT(NVWAITBASE_3D), .modulemutexes = BIT(NVMODMUTEX_3D), .class = NV_GRAPHICS_3D_CLASS_ID, - .waitbasesync = true, + .waitbasesync = false, .module = { .prepare_poweroff = nvhost_3dctx_prepare_power_off, .busy = nvhost_scale3d_notify_busy, -- cgit v1.2.3