From ff73aabd871910b44bea051e41c5024584b1061b Mon Sep 17 00:00:00 2001 From: Sanchayan Maity Date: Wed, 29 Apr 2015 19:07:36 +0530 Subject: drivers: w1: tegra_w1: Improve IRQ detection On Tegra30, on a high CPU load or operating at maximum frequency results in continous interrupt generation, with the following log spewout: (tegra_w1_irq: line 236) spurious interrupt, status = 0x800 (tegra_w1_irq: line 236) spurious interrupt, status = 0x800 (tegra_w1_irq: line 236) spurious interrupt, status = 0x800 (tegra_w1_irq: line 236) spurious interrupt, status = 0x800 which shows the TX_FIFO_DATA_REQ to be somehow continously being set. To circumvent this specifically detect the bit transfer and presence done IRQ's only, for generating a "completion" signal on which the core logic waits. We anyhow only wait for these interrupts in particular. While at it, also change the error message to be printed only if it is conditionally enabled instead of all the time, which floods the serial console and allows a wrong interpretation of the one wire device not working at all. Signed-off-by: Sanchayan Maity Signed-off-by: Stefan Agner --- drivers/w1/masters/tegra_w1.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/w1/masters/tegra_w1.c b/drivers/w1/masters/tegra_w1.c index 85eefd4d7eb5..e5781abbea53 100644 --- a/drivers/w1/masters/tegra_w1.c +++ b/drivers/w1/masters/tegra_w1.c @@ -227,12 +227,13 @@ static irqreturn_t tegra_w1_irq(int irq, void *cookie) spin_lock_irqsave(&dev->spinlock, irq_flags); - if (likely(dev->transfer_completion)) { + if (likely(dev->transfer_completion) && + ((status & OI_BIT_XFER_DONE) || (status & OI_PRESENCE_DONE))) { dev->intr_status = status; w1_writel(dev, status, OWR_INTR_STATUS); complete(dev->transfer_completion); } else { - W1_ERR("spurious interrupt, status = 0x%lx\n", status); + pr_debug("spurious interrupt, status = 0x%lx\n", status); } spin_unlock_irqrestore(&dev->spinlock, irq_flags); -- cgit v1.2.3