From 6337b9566e2370efc95b979b1b3716e88b821a35 Mon Sep 17 00:00:00 2001 From: Jack Lee Date: Wed, 3 Oct 2012 13:31:47 +0800 Subject: ENGR00223348 EPDC: Unable to enable DISPLAY regulator In the maxim 17135 driver, the power good is confirmed by the power good GPIO polarity change when comparing the status at the beginning of driver probe and display regulator enabled. However, it is not reliable since the initial value of the GPIO is not constant. Normally, it is 1 but it can be 0 after system reset unexpectedly. Now, it is changed to POK bit checking in FAULT register. Signed-off-by: Jack Lee --- include/linux/mfd/max17135.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'include') diff --git a/include/linux/mfd/max17135.h b/include/linux/mfd/max17135.h index 265b1588c10a..5785ed415a71 100644 --- a/include/linux/mfd/max17135.h +++ b/include/linux/mfd/max17135.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -167,9 +167,6 @@ struct max17135 { /* powerup/powerdown wait time */ int max_wait; - - /* Dynamically determined polarity for PWRGOOD */ - int pwrgood_polarity; }; enum { -- cgit v1.2.3