* Freescale Fast Ethernet Controller (FEC) Required properties: - compatible : Should be "fsl,-fec" - reg : Address and length of the register set for the device - interrupts : Should contain fec interrupt - phy-mode : See ethernet.txt file in the same directory - clock-name: Should be the names of the clocks - "ipg" for MAC ipg_clk_s, ipg_clk_mac_s that are for register accessing - "ahb" for MAC ipg_clk, ipg_clk_mac that are bus clock - "ptp" for IEEE1588 timer clock - "enet_clk_ref" for MAC transmit/receiver reference clock - "enet_out" output clock for external device - clocks: Phandles to input clocks. Optional properties: - phy-reset-gpios : Should specify the gpio for phy reset - phy-reset-duration : Reset duration in milliseconds. Should present only if property "phy-reset-gpios" is available. Missing the property will have the duration be 1 millisecond. Numbers greater than 1000 are invalid and 1 millisecond will be used instead. - phy-reset-active-high : If present then the reset sequence using the GPIO specified in the "phy-reset-gpios" property is reversed (H=reset state, L=operation state). - phy-supply : regulator that powers the Ethernet PHY. - phy-handle : phandle to the PHY device connected to this device. - fixed-link : Assume a fixed link. See fixed-link.txt in the same directory. Use instead of phy-handle. - fsl,num-tx-queues : The property is valid for enet-avb IP, which supports hw multi queues. Should specify the tx queue number, otherwise set tx queue number to 1. - fsl,num-rx-queues : The property is valid for enet-avb IP, which supports hw multi queues. Should specify the rx queue number, otherwise set rx queue number to 1. - fsl,magic-packet : If present, indicates that the hardware supports waking up via magic packet. - fsl,err006687-workaround-present: If present indicates that the system has the hardware workaround for ERR006687 applied and does not need a software workaround. - fsl,wakeup_irq : The property define the wakeup irq index in enet irq source. - stop-mode : If present, indicates soc need to set gpr bit to request stop mode. - fsl,ar8031-phy-fixup : If present, indicates board need to do phy fixup setting. - mii-exclusive: If present, each MAC has their exclusive MDIO bus in current board design, otherwise mutiple MACs share one MDIO bus to reduce Pins utilize. Optional subnodes: - mdio : specifies the mdio bus in the FEC, used as a container for phy nodes according to phy.txt in the same directory Example: ethernet@83fec000 { compatible = "fsl,imx51-fec", "fsl,imx27-fec"; reg = <0x83fec000 0x4000>; interrupts = <87>; phy-mode = "mii"; phy-reset-gpios = <&gpio2 14 0>; /* GPIO2_14 */ local-mac-address = [00 04 9F 01 1B B9]; phy-supply = <®_fec_supply>; }; Example with phy specified: ethernet@83fec000 { compatible = "fsl,imx51-fec", "fsl,imx27-fec"; reg = <0x83fec000 0x4000>; interrupts = <87>; phy-mode = "mii"; phy-reset-gpios = <&gpio2 14 0>; /* GPIO2_14 */ local-mac-address = [00 04 9F 01 1B B9]; phy-supply = <®_fec_supply>; phy-handle = <ðphy>; mdio { ethphy: ethernet-phy@6 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <6>; max-speed = <100>; }; }; };