/* * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ &scrm { main_fapll: main_fapll { #clock-cells = <1>; compatible = "ti,dm816-fapll-clock"; reg = <0x400 0x40>; clocks = <&sys_clkin_ck &sys_clkin_ck>; clock-indices = <1>, <2>, <3>, <4>, <5>, <6>, <7>; clock-output-names = "main_pll_clk1", "main_pll_clk2", "main_pll_clk3", "main_pll_clk4", "main_pll_clk5", "main_pll_clk6", "main_pll_clk7"; }; ddr_fapll: ddr_fapll { #clock-cells = <1>; compatible = "ti,dm816-fapll-clock"; reg = <0x440 0x30>; clocks = <&sys_clkin_ck &sys_clkin_ck>; clock-indices = <1>, <2>, <3>, <4>; clock-output-names = "ddr_pll_clk1", "ddr_pll_clk2", "ddr_pll_clk3", "ddr_pll_clk4"; }; video_fapll: video_fapll { #clock-cells = <1>; compatible = "ti,dm816-fapll-clock"; reg = <0x470 0x30>; clocks = <&sys_clkin_ck &sys_clkin_ck>; clock-indices = <1>, <2>, <3>; clock-output-names = "video_pll_clk1", "video_pll_clk2", "video_pll_clk3"; }; audio_fapll: audio_fapll { #clock-cells = <1>; compatible = "ti,dm816-fapll-clock"; reg = <0x4a0 0x30>; clocks = <&main_fapll 7>, < &sys_clkin_ck>; clock-indices = <1>, <2>, <3>, <4>, <5>; clock-output-names = "audio_pll_clk1", "audio_pll_clk2", "audio_pll_clk3", "audio_pll_clk4", "audio_pll_clk5"; }; }; &scrm_clocks { secure_32k_ck: secure_32k_ck { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; }; sys_32k_ck: sys_32k_ck { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; }; tclkin_ck: tclkin_ck { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; }; sys_clkin_ck: sys_clkin_ck { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <27000000>; }; }; /* 0x48180000 */ &prcm_clocks { clkout_pre_ck: clkout_pre_ck@100 { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&main_fapll 5 &ddr_fapll 1 &video_fapll 1 &audio_fapll 1>; reg = <0x100>; }; clkout_div_ck: clkout_div_ck@100 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&clkout_pre_ck>; ti,bit-shift = <3>; ti,max-div = <8>; reg = <0x100>; }; clkout_ck: clkout_ck@100 { #clock-cells = <0>; compatible = "ti,gate-clock"; clocks = <&clkout_div_ck>; ti,bit-shift = <7>; reg = <0x100>; }; /* CM_DPLL clocks p1795 */ sysclk1_ck: sysclk1_ck@300 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&main_fapll 1>; ti,max-div = <7>; reg = <0x0300>; }; sysclk2_ck: sysclk2_ck@304 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&main_fapll 2>; ti,max-div = <7>; reg = <0x0304>; }; sysclk3_ck: sysclk3_ck@308 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&main_fapll 3>; ti,max-div = <7>; reg = <0x0308>; }; sysclk4_ck: sysclk4_ck@30c { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&main_fapll 4>; ti,max-div = <1>; reg = <0x030c>; }; sysclk5_ck: sysclk5_ck@310 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&sysclk4_ck>; ti,max-div = <1>; reg = <0x0310>; }; sysclk6_ck: sysclk6_ck@314 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&main_fapll 4>; ti,dividers = <2>, <4>; reg = <0x0314>; }; sysclk10_ck: sysclk10_ck@324 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&ddr_fapll 2>; ti,max-div = <7>; reg = <0x0324>; }; sysclk24_ck: sysclk24_ck@3b4 { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&main_fapll 5>; ti,max-div = <7>; reg = <0x03b4>; }; mpu_ck: mpu_ck@15dc { #clock-cells = <0>; compatible = "ti,gate-clock"; clocks = <&sysclk2_ck>; ti,bit-shift = <1>; reg = <0x15dc>; }; audio_pll_a_ck: audio_pll_a_ck@35c { #clock-cells = <0>; compatible = "ti,divider-clock"; clocks = <&audio_fapll 1>; ti,max-div = <7>; reg = <0x035c>; }; sysclk18_ck: sysclk18_ck@378 { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&sys_32k_ck>, <&audio_pll_a_ck>; reg = <0x0378>; }; timer1_fck: timer1_fck@390 { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>; reg = <0x0390>; }; timer2_fck: timer2_fck@394 { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>; reg = <0x0394>; }; timer3_fck: timer3_fck@398 { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>; reg = <0x0398>; }; timer4_fck: timer4_fck@39c { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>; reg = <0x039c>; }; timer5_fck: timer5_fck@3a0 { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>; reg = <0x03a0>; }; timer6_fck: timer6_fck@3a4 { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>; reg = <0x03a4>; }; timer7_fck: timer7_fck@3a8 { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>; reg = <0x03a8>; }; };