/* * Copyright 2014-2018 Toradex AG * Copyright 2012 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. * * The code contained herein is licensed under the GNU General Public * License. You may obtain a copy of the GNU General Public License * Version 2 or later at the following locations: * * http://www.opensource.org/licenses/gpl-license.html * http://www.gnu.org/copyleft/gpl.html */ /dts-v1/; #include #include #include #include "imx6dl.dtsi" #include "imx6qdl-colibri.dtsi" / { model = "Toradex Colibri iMX6DL/S on Colibri Evaluation Board V3"; compatible = "toradex,colibri_imx6dl-eval", "toradex,colibri_imx6dl", "fsl,imx6dl"; aliases { i2c0 = &i2cddc; i2c1 = &i2c2; i2c2 = &i2c3; }; aliases { rtc0 = &rtc_i2c; rtc1 = &snvs_rtc; }; aliases { /* the following, together with kernel patches, forces a fixed assignment between device id and usdhc controller */ /* i.e. the eMMC on usdhc3 will be /dev/mmcblk0 */ mmc0 = &usdhc3; /* eMMC */ mmc1 = &usdhc1; /* MMC 4bit slot */ }; extcon_usbc_det: usbc_det { compatible = "linux,extcon-usb-gpio"; debounce = <25>; id-gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbc_det>; }; gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_keys>; wakeup { label = "Wake-Up"; gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; linux,code = ; debounce-interval = <10>; gpio-key,wakeup; }; }; v4l2_cap_0 { compatible = "fsl,imx6q-v4l2-capture"; ipu_id = <0>; csi_id = <1>; mclk_source = <0>; status = "okay"; }; }; ®_usb_host_vbus { status = "okay"; }; &backlight { brightness-levels = <0 45 63 88 119 158 203 255>; default-brightness-level = <4>; pwms = <&pwm3 0 6666667 PWM_POLARITY_INVERTED>; status = "okay"; }; / { clocks { /* fixed crystal dedicated to mcp251x */ clk16m: clk@1 { compatible = "fixed-clock"; reg=<1>; #clock-cells = <0>; clock-frequency = <16000000>; clock-output-names = "clk16m"; }; }; }; /* Colibri SPI */ &ecspi4 { status = "okay"; mcp251x0: mcp251x@1 { compatible = "microchip,mcp2515"; reg = <0>; clocks = <&clk16m>; interrupt-parent = <&gpio3>; interrupts = <27 0x2>; spi-max-frequency = <10000000>; status = "okay"; }; spidev0: spidev@1 { compatible = "toradex,evalspi"; reg = <0>; spi-max-frequency = <23000000>; status = "disabled"; }; }; /* * I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier * board) */ &i2c3 { status = "okay"; /* the PCAPs use SODIMM 28/30, also used for PWM, PWM, aka pwm1, pwm4. so if you enable one of the PCAP controllers disable the pwms */ /* Atmel maxtouch controller */ atmel_mxt_ts: atmel_mxt_ts@4a { compatible = "atmel,maxtouch"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcap_1>; reg = <0x4a>; interrupt-parent = <&gpio1>; interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */ reset-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; /* SODIMM 30 */ status = "disabled"; }; pcap: pcap@10 { /* TouchRevolution Fusion 7 and 10 multi-touch controller */ compatible = "touchrevolution,fusion-f0710a"; reg = <0x10>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcap_1>; gpios = <&gpio1 9 0 /* SODIMM 28, Pen down interrupt */ &gpio2 10 0 /* SODIMM 30, Reset */ >; status = "disabled"; }; /* M41T0M6 real time clock on carrier board */ rtc_i2c: rtc@68 { compatible = "st,m41t0"; reg = <0x68>; }; adv7280: adv7280@21 { compatible = "adv7280"; reg = <0x21>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ipu1_csi0 &pinctrl_cam_mclk>; clocks = <&clks 200>; clock-names = "csi_mclk"; DOVDD-supply = <®_3p3v>; AVDD-supply = <®_3p3v>; DVDD-supply = <®_3p3v>; PVDD-supply = <®_3p3v>; csi_id = <1>; mclk = <24000000>; mclk_source = <1>; status = "okay"; }; /* Video ADC on Analog Camera Module */ adv7180: adv7180@21 { compatible = "adv,adv7180"; reg = <0x21>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ipu1_csi0 &pinctrl_cam_mclk>; clocks = <&clks 200>; clock-names = "csi_mclk"; DOVDD-supply = <®_3p3v>; /* 3.3v */ AVDD-supply = <®_3p3v>; /* 1.8v */ DVDD-supply = <®_3p3v>; /* 1.8v */ PVDD-supply = <®_3p3v>; /* 1.8v */ csi_id = <1>; mclk = <24000000>; mclk_source = <0>; cvbs = <1>; status = "disabled"; }; max9526: max9526@20 { compatible = "maxim,max9526"; reg = <0x20>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ipu1_csi0 &pinctrl_cam_mclk>; clocks = <&clks 200>; clock-names = "csi_mclk"; DVDDIO-supply = <®_3p3v>; /* 3.3v */ AVDD-suplsply = <®_3p3v>; /* 1.8v */ DVDD-supply = <®_3p3v>; /* 1.8v */ csi_id = <1>; mclk = <24000000>; mclk_source = <0>; cvbs = <1>; status = "okay"; }; }; &iomuxc { /* * Mux all pins which are unused to be GPIOs * so they are ready for export to user space */ pinctrl-names = "default"; pinctrl-0 = < &pinctrl_weim_gpio_1 &pinctrl_weim_gpio_2 &pinctrl_weim_gpio_3 &pinctrl_weim_gpio_4 &pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6 &pinctrl_gpio_1 &pinctrl_gpio_2 &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1 >; gpio { pinctrl_pcap_1: pcap-1 { fsl,pins = < MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 /* SODIMM 28 */ MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0 /* SODIMM 30 */ >; }; pinctrl_mxt_ts: mxt-ts { fsl,pins = < MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x130b0 /* SODIMM 107 */ MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x130b0 /* SODIMM 106 */ >; }; }; }; &lcd { status = "okay"; }; &mxcfb1 { status = "okay"; }; &mxcfb2 { status = "okay"; }; /* the PCAPs use SODIMM 28/30, also used for PWM, PWM, aka pwm1, pwm4. so if you enable one of the PCAP controllers disable the pwms */ &pwm1 { status = "okay"; }; &pwm4 { status = "okay"; }; &uart1 { status = "okay"; }; &uart2 { status = "okay"; #if 0 linux,rs485-enabled-at-boot-time; rs485-rts-active-low; rs485-rx-during-tx; #endif }; &uart3 { status = "okay"; }; &usbh1 { status = "okay"; }; &usbotg { status = "okay"; extcon = <&extcon_usbc_det>, <&extcon_usbc_det>; }; /* MMC */ &usdhc1 { status = "okay"; }; &weim { status = "okay"; fsl,weim-cs-gpr = <&gpr>; /* weim memory map: 32MB on CS0, 32MB on CS1, 32MB on CS2, 32MB on CS3 */ ranges = <0 0 0x08000000 0x02000000 1 0 0x0a000000 0x02000000 2 0 0x0c000000 0x02000000 3 0 0x0e000000 0x02000000>; /* SRAM on CS0 */ sram@0,0 { compatible = "cypress,cy7c1019dv33-10zsxi, mtd-ram"; reg = <0 0 0x00010000>; #address-cells = <1>; #size-cells = <1>; bank-width = <2>; fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000 0x00000000 0x04000040 0x00000000>; }; /* SRAM on CS1 */ sram@1,0 { compatible = "cypress,cy7c1019dv33-10zsxi, mtd-ram"; reg = <1 0 0x00010000>; #address-cells = <1>; #size-cells = <1>; bank-width = <2>; fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000 0x00000000 0x04000040 0x00000000>; }; };