/* * Copyright 2011 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. * * The code contained herein is licensed under the GNU General Public * License. You may obtain a copy of the GNU General Public License * Version 2 or later at the following locations: * * http://www.opensource.org/licenses/gpl-license.html * http://www.gnu.org/copyleft/gpl.html */ /dts-v1/; #include #include "imx6q.dtsi" / { model = "Freescale i.MX6 Quad Armadillo2 Board"; compatible = "fsl,imx6q-arm2", "fsl,imx6q"; memory { reg = <0x10000000 0x80000000>; }; regulators { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <0>; reg_3p3v: regulator@0 { compatible = "regulator-fixed"; reg = <0>; regulator-name = "3P3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; reg_usb_otg_vbus: regulator@1 { compatible = "regulator-fixed"; reg = <1>; regulator-name = "usb_otg_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio3 22 0>; enable-active-high; }; }; leds { compatible = "gpio-leds"; debug-led { label = "Heartbeat"; gpios = <&gpio3 25 0>; linux,default-trigger = "heartbeat"; }; }; }; &gpmi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpmi_nand>; status = "disabled"; /* gpmi nand conflicts with SD */ nand-on-flash-bbt; }; &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; imx6q-arm2 { pinctrl_hog: hoggrp { fsl,pins = < MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000 >; }; pinctrl_enet: enetgrp { fsl,pins = < MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 >; }; pinctrl_gpmi_nand: gpminandgrp { fsl,pins = < MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 >; }; pinctrl_uart2: uart2grp { fsl,pins = < MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1 MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1 MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1 MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1 >; }; pinctrl_uart4: uart4grp { fsl,pins = < MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 >; }; pinctrl_usbotg: usbotggrp { fsl,pins = < MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 >; }; pinctrl_usbh2_1: usbh2grp-1 { fsl,pins = < MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x40013030 MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x40013030 >; }; pinctrl_usbh2_2: usbh2grp-2 { fsl,pins = < MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x40017030 >; }; pinctrl_usbh3_1: usbh3grp-1 { fsl,pins = < MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA 0x40013030 MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x40013030 >; }; pinctrl_usbh3_2: usbh3grp-2 { fsl,pins = < MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x40017030 >; }; pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 >; }; pinctrl_usdhc3_cdwp: usdhc3cdwp { fsl,pins = < MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000 >; }; pinctrl_usdhc4: usdhc4grp { fsl,pins = < MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 >; }; }; }; &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii"; interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; fsl,err006687-workaround-present; status = "okay"; }; &usbotg { vbus-supply = <®_usb_otg_vbus>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg>; disable-over-current; srp-disable; hnp-disable; adp-disable; status = "okay"; }; &usdhc3 { cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>; vmmc-supply = <®_3p3v>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_cdwp>; status = "okay"; }; &usdhc4 { non-removable; vmmc-supply = <®_3p3v>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc4>; status = "okay"; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; fsl,dte-mode; uart-has-rtscts; status = "okay"; }; &uart4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart4>; status = "okay"; };