/* * Copyright 2014-2017 Toradex AG * Copyright 2012 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual * licensing only applies to this file, and not this project as a * whole. * * a) This file is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * version 2 as published by the Free Software Foundation. * * This file is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, * copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following * conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #include / { model = "Toradex Apalis iMX6Q/D Module"; compatible = "toradex,apalis_imx6q", "fsl,imx6q"; backlight: backlight { compatible = "pwm-backlight"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_bl_on>; pwms = <&pwm4 0 5000000>; enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; status = "disabled"; }; reg_2p5v: regulator-2p5v { compatible = "regulator-fixed"; regulator-name = "2P5V"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-always-on; }; reg_3p3v: regulator-3p3v { compatible = "regulator-fixed"; regulator-name = "3P3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; reg_usb_otg_vbus: regulator-usb-otg-vbus { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_regulator_usbotg_pwr>; regulator-name = "usb_otg_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; enable-active-high; status = "disabled"; }; /* on module USB hub */ reg_usb_host_vbus_hub: regulator-usb-host-vbus-hub { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_regulator_usbhub_pwr>; regulator-name = "usb_host_vbus_hub"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio3 28 GPIO_ACTIVE_HIGH>; startup-delay-us = <2000>; enable-active-high; status = "okay"; }; reg_usb_host_vbus: regulator-usb-host-vbus { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_regulator_usbh_pwr>; regulator-name = "usb_host_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; enable-active-high; vin-supply = <®_usb_host_vbus_hub>; status = "disabled"; }; sound { compatible = "fsl,imx-audio-sgtl5000"; model = "imx6q-apalis-sgtl5000"; ssi-controller = <&ssi1>; audio-codec = <&codec>; audio-routing = "LINE_IN", "Line In Jack", "MIC_IN", "Mic Jack", "Mic Jack", "Mic Bias", "Headphone Jack", "HP_OUT"; mux-int-port = <1>; mux-ext-port = <4>; }; sound_spdif: sound-spdif { compatible = "fsl,imx-audio-spdif"; model = "imx-spdif"; spdif-controller = <&spdif>; spdif-in; spdif-out; status = "disabled"; }; }; &audmux { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_audmux>; status = "okay"; }; &can1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan1>; status = "disabled"; }; &can2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan2>; status = "disabled"; }; /* Apalis SPI1 */ &ecspi1 { cs-gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi1>; status = "disabled"; }; /* Apalis SPI2 */ &ecspi2 { cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi2>; status = "disabled"; }; &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii"; phy-handle = <ðphy>; phy-reset-duration = <10>; phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; status = "okay"; mdio { #address-cells = <1>; #size-cells = <0>; ethphy: ethernet-phy@7 { interrupt-parent = <&gpio1>; interrupts = <30 IRQ_TYPE_LEVEL_LOW>; reg = <7>; }; }; }; &hdmi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hdmi_ddc>; status = "disabled"; }; /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "disabled"; }; /* * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and * touch screen controller */ &i2c2 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; pmic: pfuze100@08 { compatible = "fsl,pfuze100"; reg = <0x08>; regulators { sw1a_reg: sw1ab { regulator-min-microvolt = <300000>; regulator-max-microvolt = <1875000>; regulator-boot-on; regulator-always-on; regulator-ramp-delay = <6250>; }; sw1c_reg: sw1c { regulator-min-microvolt = <300000>; regulator-max-microvolt = <1875000>; regulator-boot-on; regulator-always-on; regulator-ramp-delay = <6250>; }; sw3a_reg: sw3a { regulator-min-microvolt = <400000>; regulator-max-microvolt = <1975000>; regulator-boot-on; regulator-always-on; }; swbst_reg: swbst { regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5150000>; regulator-boot-on; regulator-always-on; }; snvs_reg: vsnvs { regulator-min-microvolt = <1000000>; regulator-max-microvolt = <3000000>; regulator-boot-on; regulator-always-on; }; vref_reg: vrefddr { regulator-boot-on; regulator-always-on; }; vgen1_reg: vgen1 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <1550000>; regulator-boot-on; regulator-always-on; }; vgen2_reg: vgen2 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <1550000>; regulator-boot-on; regulator-always-on; }; vgen3_reg: vgen3 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; vgen4_reg: vgen4 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; vgen5_reg: vgen5 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; vgen6_reg: vgen6 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; }; }; codec: sgtl5000@0a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; }; /* STMPE811 touch screen controller */ stmpe811@41 { compatible = "st,stmpe811"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_touch_int>; reg = <0x41>; interrupts = <10 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&gpio4>; interrupt-controller; id = <0>; blocks = <0x5>; irq-trigger = <0x1>; stmpe_touchscreen { compatible = "st,stmpe-ts"; /* 3.25 MHz ADC clock speed */ st,adc-freq = <1>; /* 8 sample average control */ st,ave-ctrl = <3>; /* 7 length fractional part in z */ st,fraction-z = <7>; /* * 50 mA typical 80 mA max touchscreen drivers * current limit value */ st,i-drive = <1>; /* 12-bit ADC */ st,mod-12b = <1>; /* internal ADC reference */ st,ref-sel = <0>; /* ADC converstion time: 80 clocks */ st,sample-time = <4>; /* 1 ms panel driver settling time */ st,settling = <3>; /* 5 ms touch detect interrupt delay */ st,touch-det-delay = <5>; }; }; }; /* * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier * board) */ &i2c3 { clock-frequency = <100000>; pinctrl-names = "default", "recovery"; pinctrl-0 = <&pinctrl_i2c3>; pinctrl-1 = <&pinctrl_i2c3_recovery>; scl-gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>; sda-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>; status = "disabled"; }; &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "disabled"; }; &pwm2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; status = "disabled"; }; &pwm3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; status = "disabled"; }; &pwm4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; status = "disabled"; }; &spdif { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spdif>; status = "disabled"; }; &ssi1 { status = "okay"; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>; fsl,dte-mode; uart-has-rtscts; status = "disabled"; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2_dte>; fsl,dte-mode; uart-has-rtscts; status = "disabled"; }; &uart4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart4_dte>; fsl,dte-mode; status = "disabled"; }; &uart5 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart5_dte>; fsl,dte-mode; status = "disabled"; }; &usbotg { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg>; disable-over-current; status = "disabled"; }; /* MMC1 */ &usdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_usdhc1_8bit>; vqmmc-supply = <®_3p3v>; bus-width = <8>; disable-wp; no-1-8-v; status = "disabled"; }; /* SD1 */ &usdhc2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2>; vqmmc-supply = <®_3p3v>; bus-width = <4>; disable-wp; no-1-8-v; status = "disabled"; }; /* eMMC */ &usdhc3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3>; vqmmc-supply = <®_3p3v>; bus-width = <8>; no-1-8-v; non-removable; status = "okay"; }; &weim { status = "disabled"; }; &iomuxc { /* pins used on module */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_reset_moci>; pinctrl_apalis_gpio1: gpio2io04grp { fsl,pins = < MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x130b0 >; }; pinctrl_apalis_gpio2: gpio2io05grp { fsl,pins = < MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x130b0 >; }; pinctrl_apalis_gpio3: gpio2io06grp { fsl,pins = < MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x130b0 >; }; pinctrl_apalis_gpio4: gpio2io07grp { fsl,pins = < MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x130b0 >; }; pinctrl_apalis_gpio5: gpio6io10grp { fsl,pins = < MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x130b0 >; }; pinctrl_apalis_gpio6: gpio6io09grp { fsl,pins = < MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x130b0 >; }; pinctrl_apalis_gpio7: gpio1io02grp { fsl,pins = < MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b0 >; }; pinctrl_apalis_gpio8: gpio1io06grp { fsl,pins = < MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x130b0 >; }; pinctrl_audmux: audmuxgrp { fsl,pins = < MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0 MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0 MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0 MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0 /* SGTL5000 sys_mclk */ MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0 >; }; pinctrl_cam_mclk: cammclkgrp { fsl,pins = < /* CAM sys_mclk */ MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x00b0 >; }; pinctrl_ecspi1: ecspi1grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO 0x100b1 MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI 0x100b1 MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK 0x100b1 /* SPI1 cs */ MX6QDL_PAD_CSI0_DAT7__GPIO5_IO25 0x000b1 >; }; pinctrl_ecspi2: ecspi2grp { fsl,pins = < MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 /* SPI2 cs */ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1 >; }; pinctrl_enet: enetgrp { fsl,pins = < MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 /* Ethernet PHY reset */ MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0 /* Ethernet PHY interrupt */ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x000b1 >; }; pinctrl_flexcan1: flexcan1grp { fsl,pins = < MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0 >; }; pinctrl_flexcan2: flexcan2grp { fsl,pins = < MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0 >; }; pinctrl_gpio_bl_on: gpioblon { fsl,pins = < MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b0 >; }; pinctrl_gpio_keys: gpio1io04grp { fsl,pins = < /* Power button */ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 >; }; pinctrl_hdmi_cec: hdmicecgrp { fsl,pins = < MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 >; }; pinctrl_hdmi_ddc: hdmiddcgrp { fsl,pins = < MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x4001b8b1 MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x4001b8b1 >; }; pinctrl_i2c1: i2c1grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 >; }; pinctrl_i2c2: i2c2grp { fsl,pins = < MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 >; }; pinctrl_i2c3: i2c3grp { fsl,pins = < MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 >; }; pinctrl_i2c3_recovery: i2c3recoverygrp { fsl,pins = < MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x4001b8b1 MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x4001b8b1 >; }; pinctrl_ipu1_csi0: ipu1csi0grp { /* parallel camera */ fsl,pins = < MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0xb0b1 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0xb0b1 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0xb0b1 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0xb0b1 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0xb0b1 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0xb0b1 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0xb0b1 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0xb0b1 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0xb0b1 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0xb0b1 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0xb0b1 >; }; pinctrl_ipu1_lcdif: ipu1lcdifgrp { fsl,pins = < MX6QDL_PAD_EIM_A16__IPU1_DI1_DISP_CLK 0x61 /* DE */ MX6QDL_PAD_EIM_DA10__IPU1_DI1_PIN15 0x61 /* HSync */ MX6QDL_PAD_EIM_DA11__IPU1_DI1_PIN02 0x61 /* VSync */ MX6QDL_PAD_EIM_DA12__IPU1_DI1_PIN03 0x61 MX6QDL_PAD_EIM_DA9__IPU1_DISP1_DATA00 0x61 MX6QDL_PAD_EIM_DA8__IPU1_DISP1_DATA01 0x61 MX6QDL_PAD_EIM_DA7__IPU1_DISP1_DATA02 0x61 MX6QDL_PAD_EIM_DA6__IPU1_DISP1_DATA03 0x61 MX6QDL_PAD_EIM_DA5__IPU1_DISP1_DATA04 0x61 MX6QDL_PAD_EIM_DA4__IPU1_DISP1_DATA05 0x61 MX6QDL_PAD_EIM_DA3__IPU1_DISP1_DATA06 0x61 MX6QDL_PAD_EIM_DA2__IPU1_DISP1_DATA07 0x61 MX6QDL_PAD_EIM_DA1__IPU1_DISP1_DATA08 0x61 MX6QDL_PAD_EIM_DA0__IPU1_DISP1_DATA09 0x61 MX6QDL_PAD_EIM_EB1__IPU1_DISP1_DATA10 0x61 MX6QDL_PAD_EIM_EB0__IPU1_DISP1_DATA11 0x61 MX6QDL_PAD_EIM_A17__IPU1_DISP1_DATA12 0x61 MX6QDL_PAD_EIM_A18__IPU1_DISP1_DATA13 0x61 MX6QDL_PAD_EIM_A19__IPU1_DISP1_DATA14 0x61 MX6QDL_PAD_EIM_A20__IPU1_DISP1_DATA15 0x61 MX6QDL_PAD_EIM_A21__IPU1_DISP1_DATA16 0x61 MX6QDL_PAD_EIM_A22__IPU1_DISP1_DATA17 0x61 MX6QDL_PAD_EIM_A23__IPU1_DISP1_DATA18 0x61 MX6QDL_PAD_EIM_A24__IPU1_DISP1_DATA19 0x61 MX6QDL_PAD_EIM_D31__IPU1_DISP1_DATA20 0x61 MX6QDL_PAD_EIM_D30__IPU1_DISP1_DATA21 0x61 MX6QDL_PAD_EIM_D26__IPU1_DISP1_DATA22 0x61 MX6QDL_PAD_EIM_D27__IPU1_DISP1_DATA23 0x61 >; }; pinctrl_ipu2_vdac: ipu2vdacgrp { fsl,pins = < MX6QDL_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK 0xd1 MX6QDL_PAD_DI0_PIN15__IPU2_DI0_PIN15 0xd1 MX6QDL_PAD_DI0_PIN2__IPU2_DI0_PIN02 0xd1 MX6QDL_PAD_DI0_PIN3__IPU2_DI0_PIN03 0xd1 MX6QDL_PAD_DISP0_DAT0__IPU2_DISP0_DATA00 0xf9 MX6QDL_PAD_DISP0_DAT1__IPU2_DISP0_DATA01 0xf9 MX6QDL_PAD_DISP0_DAT2__IPU2_DISP0_DATA02 0xf9 MX6QDL_PAD_DISP0_DAT3__IPU2_DISP0_DATA03 0xf9 MX6QDL_PAD_DISP0_DAT4__IPU2_DISP0_DATA04 0xf9 MX6QDL_PAD_DISP0_DAT5__IPU2_DISP0_DATA05 0xf9 MX6QDL_PAD_DISP0_DAT6__IPU2_DISP0_DATA06 0xf9 MX6QDL_PAD_DISP0_DAT7__IPU2_DISP0_DATA07 0xf9 MX6QDL_PAD_DISP0_DAT8__IPU2_DISP0_DATA08 0xf9 MX6QDL_PAD_DISP0_DAT9__IPU2_DISP0_DATA09 0xf9 MX6QDL_PAD_DISP0_DAT10__IPU2_DISP0_DATA10 0xf9 MX6QDL_PAD_DISP0_DAT11__IPU2_DISP0_DATA11 0xf9 MX6QDL_PAD_DISP0_DAT12__IPU2_DISP0_DATA12 0xf9 MX6QDL_PAD_DISP0_DAT13__IPU2_DISP0_DATA13 0xf9 MX6QDL_PAD_DISP0_DAT14__IPU2_DISP0_DATA14 0xf9 MX6QDL_PAD_DISP0_DAT15__IPU2_DISP0_DATA15 0xf9 >; }; pinctrl_mmc_cd: gpiommccdgrp { fsl,pins = < /* MMC1 CD */ MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x000b0 >; }; pinctrl_pwm1: pwm1grp { fsl,pins = < MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 >; }; pinctrl_pwm2: pwm2grp { fsl,pins = < MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1 >; }; pinctrl_pwm3: pwm3grp { fsl,pins = < MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 >; }; pinctrl_pwm4: pwm4grp { fsl,pins = < MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1 >; }; pinctrl_regulator_usbh_pwr: gpioregusbhpwrgrp { fsl,pins = < /* USBH_EN */ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x0f058 >; }; pinctrl_regulator_usbhub_pwr: gpioregusbhubpwrgrp { fsl,pins = < /* USBH_HUB_EN */ MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x0f058 >; }; pinctrl_regulator_usbotg_pwr: gpioregusbotgpwrgrp { fsl,pins = < /* USBO1 power en */ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x0f058 >; }; pinctrl_reset_moci: gpioresetmocigrp { fsl,pins = < /* RESET_MOCI control */ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x0f058 >; }; pinctrl_sd_cd: gpiosdcdgrp { fsl,pins = < /* SD1 CD */ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x000b0 >; }; pinctrl_spdif: spdifgrp { fsl,pins = < MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0 >; }; pinctrl_touch_int: gpiotouchintgrp { fsl,pins = < /* STMPE811 interrupt */ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 >; }; pinctrl_uart1_dce: uart1dcegrp { fsl,pins = < MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 >; }; /* DTE mode */ pinctrl_uart1_dte: uart1dtegrp { fsl,pins = < MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x1b0b1 MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x1b0b1 MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x1b0b1 MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1 >; }; /* Additional DTR, DSR, DCD */ pinctrl_uart1_ctrl: uart1ctrlgrp { fsl,pins = < MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0 MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0 MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0 >; }; pinctrl_uart2_dce: uart2dcegrp { fsl,pins = < MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 >; }; /* DTE mode */ pinctrl_uart2_dte: uart2dtegrp { fsl,pins = < MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA 0x1b0b1 MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1 MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1 MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1 >; }; pinctrl_uart4_dce: uart4dcegrp { fsl,pins = < MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 >; }; /* DTE mode */ pinctrl_uart4_dte: uart4dtegrp { fsl,pins = < MX6QDL_PAD_KEY_COL0__UART4_RX_DATA 0x1b0b1 MX6QDL_PAD_KEY_ROW0__UART4_TX_DATA 0x1b0b1 >; }; pinctrl_uart5_dce: uart5dcegrp { fsl,pins = < MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 >; }; /* DTE mode */ pinctrl_uart5_dte: uart5dtegrp { fsl,pins = < MX6QDL_PAD_KEY_COL1__UART5_RX_DATA 0x1b0b1 MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA 0x1b0b1 >; }; pinctrl_usbotg: usbotggrp { fsl,pins = < MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 >; }; pinctrl_usdhc1_4bit: usdhc1grp_4bit { fsl,pins = < MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 >; }; pinctrl_usdhc1_8bit: usdhc1grp_8bit { fsl,pins = < MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x17071 MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x17071 MX6QDL_PAD_NANDF_D2__SD1_DATA6 0x17071 MX6QDL_PAD_NANDF_D3__SD1_DATA7 0x17071 >; }; pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17071 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17071 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071 >; }; pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 /* eMMC reset */ MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059 >; }; pinctrl_usdhc3_100mhz: usdhc3100mhzgrp { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9 /* eMMC reset */ MX6QDL_PAD_SD3_RST__SD3_RESET 0x170b9 >; }; pinctrl_usdhc3_200mhz: usdhc3200mhzgrp { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9 /* eMMC reset */ MX6QDL_PAD_SD3_RST__SD3_RESET 0x170f9 >; }; };