/* * Copyright 2016 Freescale Semiconductor, Inc. * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual * licensing only applies to this file, and not this project as a * whole. * * a) This file is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of the * License, or (at your option) any later version. * * This file is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, * copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following * conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; #include "imx6qp.dtsi" #include "imx6qdl-sabresd.dtsi" / { model = "Freescale i.MX6 Quad Plus SABRE Smart Device Board"; compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp"; }; ®_arm { vin-supply = <&sw2_reg>; }; &iomuxc { imx6qdl-sabresd { pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059 MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059 MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059 MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059 >; }; pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10071 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 >; }; }; }; &iomuxc { imx6qdl-sabresd { pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059 MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059 MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059 MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059 >; }; pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10071 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 >; }; }; }; &ldb { lvds-channel@0 { crtc = "ipu2-di0"; }; lvds-channel@1 { crtc = "ipu2-di1"; }; }; &mxcfb1 { prefetch; status = "okay"; }; &mxcfb2 { prefetch; status = "okay"; }; &mxcfb3 { prefetch; status = "okay"; }; &mxcfb4 { prefetch; status = "okay"; }; &ov564x { AVDD-supply = <&vgen6_reg>; /* 2.8v */ DOVDD-supply = <&sw4_reg>; /* 1.8v */ }; &ov564x_mipi { AVDD-supply = <&vgen6_reg>; /* 2.8v */ DOVDD-supply = <&sw4_reg>; /* 1.8v */ }; &pcie { pcie-bus-supply = <&vgen3_reg>; /* 1.8v pwr up pcie ext osc on revb */ reset-gpio = <&gpio7 12 0>; status = "okay"; }; &pre1 { status = "okay"; }; &pre2 { status = "okay"; }; &pre3 { status = "okay"; }; &pre4 { status = "okay"; }; &prg1 { memory-region = <&memory>; status = "okay"; }; &prg2 { memory-region = <&memory>; status = "okay"; }; &sata { status = "okay"; };