/*
 * arch/arm/boot/dts/tegra124-ardbeg-e1780-1000-a00-common.dtsi
 *
 * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along
 * with this program; if not, write to the Free Software Foundation, Inc.,
 * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
 */

/**
 * Common dtsi file for tegra124-ardbeg-e1780-1000-a00 varients.
 */

#include "tegra124.dtsi"
#include "tegra124-platforms/tegra124-ardbeg-powermon-e1780-1000-a00.dtsi"
#include "tegra124-platforms/tegra124-tn8-gpio-e1780-1100-a02.dtsi"
#include "tegra124-platforms/tegra124-tn8-pinmux-e1780-1100-a02.dtsi"
#include "tegra124-platforms/tegra124-tn8-keys-e1780-1100-a02.dtsi"
#include "tegra-panel.dtsi"
#include "tegra124-platforms/tegra124-ardbeg-hdmi-e1780-1000-a00.dtsi"
#include "tegra124-platforms/tegra124-tn8-camera-e1780-a00.dtsi"

/ {
	model = "NVIDIA Tegra124 Ardbeg";
	compatible = "nvidia,ardbeg", "nvidia,tegra124";
	nvidia,boardids = "1780:1000:00:B:3";
	#address-cells = <2>;
	#size-cells = <2>;

	chosen {
		bootargs = "tegraid=40.0.0.00.00 vmalloc=256M video=tegrafb console=ttyS0,115200n8 earlyprintk";
		linux,initrd-start = <0x85000000>;
		linux,initrd-end = <0x851bc400>;
	};
	host1x {
		/* tegradc.0 */
		dc@54200000 {
			status = "okay";
			nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
			nvidia,emc-clk-rate = <204000000>;
			nvidia,cmu-enable = <1>;
			nvidia,low-v-win = <0x2>;
			nvidia,dc-connection = "internal-lcd";
			nvidia,fb-bpp = <32>; /* bits per pixel */
			nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
		};
		/* tegradc.1 */
		dc@54240000 {
			status = "okay";
			nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
			nvidia,emc-clk-rate = <300000000>;
			nvidia,dc-connection = "external-display";
			nvidia,fb-bpp = <32>; /* bits per pixel */
			nvidia,fb-flags = <TEGRA_FB_FLIP_ON_PROBE>;
		};
		dsi {
			nvidia,dsi-controller-vs = <1>;
			status = "okay";
			panel-p-wuxga-10-1 {
				nvidia,dsi-panel-rst-gpio = <&gpio TEGRA_GPIO(H, 3) 0>; /* PH3 */
				nvidia,dsi-panel-bl-pwm-gpio = <&gpio TEGRA_GPIO(H, 1) 0>; /* PH1 */
			};
			panel-s-wqxga-10-1 {
				nvidia,dsi-panel-rst-gpio = <&gpio TEGRA_GPIO(H, 3) 0>; /* PH3 */
				nvidia,dsi-panel-bl-pwm-gpio = <&gpio TEGRA_GPIO(H, 1) 0>; /* PH1 */
				nvidia,dsi-te-gpio = <&gpio TEGRA_GPIO(R, 6) 0>; /* PR6 */
			};
		};
	};
        serial@70006000 {
                compatible = "nvidia,tegra114-hsuart";
                status = "okay";
        };

        serial@70006040 {
                compatible = "nvidia,tegra114-hsuart";
                status = "okay";
        };

        serial@70006200 {
                compatible = "nvidia,tegra114-hsuart";
                status = "okay";
        };

	memory@0x80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x80000000>;
	};

	i2c@7000c400 {
		bq20z75@0b {
			compatible = "sbs,sbs-battery";
			reg = <0x0b>;
			status = "disabled";
			sbs,i2c-retry-count = <2>;
			sbs,poll-retry-count = <100>;
		};
	};

	i2c@7000d000 {
		nvidia,bit-banging-xfer-after-shutdown;
	};

	spi@7000d400 {
		status = "okay";
		spi-max-frequency = <25000000>;
	};

	spi@7000da00 {
		status = "okay";
		spi-max-frequency = <25000000>;
	};

	pmc {
		status = "okay";
		nvidia,invert-interrupt;
		nvidia,suspend-mode = <0>;
		nvidia,cpu-pwr-good-time = <500>;
		nvidia,cpu-pwr-off-time = <300>;
		nvidia,core-pwr-good-time = <3845 3845>;
		nvidia,core-pwr-off-time = <2000>;
		nvidia,core-power-req-active-high;
		nvidia,sys-clock-req-active-high;
	};

	stm8t143 {
		compatible = "stm,stm8t143";
		pout-gpio = <&gpio 190 0>;
		tout-gpio = <&gpio 112 0>;
	};

	xusb@70090000 {
		/* nvidia,uses_external_pmic;
		nvidia,gpio_controls_muxed_ss_lanes; */
		nvidia,gpio_ss1_sata = <0>;
		nvidia,portmap = <0x703>; /* SSP0, SSP1 USB2P0, USB2P1, USBP2 */
		nvidia,ss_portmap = <0x20>; /* SSP0 on USB2P0, SSP1 on USB2P2 */
		nvidia,lane_owner = <6>; /* USB3P0 USB3P1 */
		nvidia,ulpicap = <0>; /* No ulpi support. can we remove */
		/* hsic config values in order defined in structure */
		nvidia,hsic0 = /bits/8 <0x1 0x1 0x8 0xa 0 0 1 0x22 0>;
		status = "okay";
	};
};