/* * arch/arm/boot/dts/tegra124-ardbeg-e1780-1000-a03-00.dts * * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. */ /dts-v1/; #include "tegra124-ardbeg-e1780-1000-a03-common.dtsi" #include "tegra124-platforms/tegra124-ardbeg-pmic-e1735-1000-a00.dtsi" #include "tegra124-platforms/tegra124-ardbeg-fixed-e1735-1000-a00.dtsi" #include "tegra124-platforms/tegra124-e1780-e1735-dfll.dtsi" #include "tegra-panel.dtsi" #include "tegra124-platforms/tegra124-ardbeg-hdmi-e1780-1000-a00.dtsi" / { nvidia,boardids = "1780:1000:03:B:3;1735:1000:01:D:3"; nvidia,dtsfilename = __FILE__; nvidia,proc-boardid = "1780:1000:03:B:3"; nvidia,pmu-boardid = "1735:1000:01:D:3"; host1x { /* tegradc.0 */ dc@54200000 { status = "okay"; nvidia,dc-flags = ; nvidia,emc-clk-rate = <204000000>; nvidia,cmu-enable = <1>; nvidia,low-v-win = <0x2>; nvidia,dc-connection = "internal-lcd"; nvidia,fb-bpp = <32>; /* bits per pixel */ nvidia,fb-flags = ; }; /* tegradc.1 */ dc@54240000 { status = "okay"; nvidia,dc-flags = ; nvidia,emc-clk-rate = <300000000>; nvidia,dc-connection = "external-display"; nvidia,fb-bpp = <32>; /* bits per pixel */ nvidia,fb-flags = ; avdd_hdmi-supply = <&palmas_smps9>; avdd_hdmi_pll-supply = <&palmas_smps9>; vdd_hdmi_5v0-supply = <&vdd_hdmi_5v0>; }; dsi { nvidia,dsi-controller-vs = ; status = "okay"; panel-l-wxga-7 { nvidia,dsi-panel-bl-pwm-gpio = <&gpio TEGRA_GPIO(H, 1) 0>; /* PH1 */ }; panel-p-wuxga-10-1 { nvidia,dsi-panel-rst-gpio = <&gpio TEGRA_GPIO(H, 3) 0>; /* PH3 */ nvidia,dsi-panel-bl-pwm-gpio = <&gpio TEGRA_GPIO(H, 1) 0>; /* PH1 */ }; panel-s-wqxga-10-1 { nvidia,dsi-panel-rst-gpio = <&gpio TEGRA_GPIO(H, 3) 0>; /* PH3 */ nvidia,dsi-panel-bl-pwm-gpio = <&gpio TEGRA_GPIO(H, 1) 0>; /* PH1 */ nvidia,dsi-te-gpio = <&gpio TEGRA_GPIO(R, 6) 0>; /* PR6 */ }; }; }; };