if ARCH_TEGRA comment "NVIDIA Tegra options" config ARCH_TEGRA_2x_SOC bool "Tegra 2 family SOC" default y depends on !ARCH_TEGRA_3x_SOC select CPU_V7 select ARM_GIC select ARCH_REQUIRE_GPIOLIB select ARM_ERRATA_742230 select USB_ARCH_HAS_EHCI if USB_SUPPORT select USB_ULPI if USB_SUPPORT select USB_ULPI_VIEWPORT if USB_SUPPORT help Support for NVIDIA Tegra AP20 and T20 processors, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller config ARCH_TEGRA_3x_SOC bool "Tegra 3 family SOC" select CPU_V7 select ARM_GIC select ARCH_REQUIRE_GPIOLIB select TEGRA_IOVMM select USB_ARCH_HAS_EHCI if USB_SUPPORT select USB_EHCI_TEGRA if USB_SUPPORT select USB_ULPI if USB_SUPPORT select USB_ULPI_VIEWPORT if USB_SUPPORT select REPORT_PRESENT_CPUS if TEGRA_AUTO_HOTPLUG help Support for NVIDIA Tegra 3 family of SoCs, based upon the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller comment "Tegra board type" config MACH_HARMONY bool "Harmony board" depends on ARCH_TEGRA_2x_SOC help Support for NVIDIA Harmony development platform config MACH_VENTANA bool "Ventana board" depends on ARCH_TEGRA_2x_SOC help Support for NVIDIA Ventana development platform config MACH_WHISTLER bool "Whistler board" depends on ARCH_TEGRA_2x_SOC help Support for NVIDIA Whistler development platform config MACH_ARUBA bool "Aruba board" depends on ARCH_TEGRA_3x_SOC select TEGRA_FPGA_PLATFORM help Support for NVIDIA Aruba2 FPGA development platform config MACH_CARDHU bool "Cardhu board" depends on ARCH_TEGRA_3x_SOC help Support for NVIDIA Cardhu development platform config MACH_TEGRA_ENTERPRISE bool "Enterprise board" depends on ARCH_TEGRA_3x_SOC help Support for NVIDIA Enterprise development platform choice prompt "Tegra platform type" default TEGRA_SILICON_PLATFORM config TEGRA_SILICON_PLATFORM bool "Silicon" help This enables support for a Tegra silicon platform. config TEGRA_SIMULATION_PLATFORM bool "Simulation" help This enables support for a Tegra simulation platform. Select this only if you are an NVIDIA developer working on a simulation platform. config TEGRA_FPGA_PLATFORM bool "FPGA" help This enables support for a Tegra FPGA platform. Select this only if you are an NVIDIA developer working on a FPGA platform. endchoice choice prompt "Low-level debug console UART" default TEGRA_DEBUG_UART_NONE config TEGRA_DEBUG_UART_NONE bool "None" config TEGRA_DEBUG_UARTA bool "UART-A" depends on DEBUG_LL config TEGRA_DEBUG_UARTB bool "UART-B" depends on DEBUG_LL config TEGRA_DEBUG_UARTC bool "UART-C" depends on DEBUG_LL config TEGRA_DEBUG_UARTD bool "UART-D" depends on DEBUG_LL config TEGRA_DEBUG_UARTE bool "UART-E" depends on DEBUG_LL endchoice config TEGRA_SYSTEM_DMA bool "Enable system DMA driver for NVIDIA Tegra SoCs" default y help Adds system DMA functionality for NVIDIA Tegra SoCs, used by several Tegra device drivers config TEGRA_PWM tristate "Enable PWM driver" select HAVE_PWM help Enable support for the Tegra PWM controller(s). config TEGRA_FIQ_DEBUGGER bool "Enable the FIQ serial debugger on Tegra" default y select FIQ_DEBUGGER help Enables the FIQ serial debugger on Tegra" endif config TEGRA_CARDHU_DSI bool "Support DSI panel on Cardhu" depends on MACH_CARDHU select TEGRA_DSI help Support for DSI Panel on Nvidia Cardhu config TEGRA_EMC_SCALING_ENABLE bool "Enable scaling the memory frequency" depends on TEGRA_SILICON_PLATFORM default n config TEGRA_CPU_DVFS bool "Enable voltage scaling on Tegra CPU" depends on TEGRA_SILICON_PLATFORM default y config TEGRA_CORE_DVFS bool "Enable voltage scaling on Tegra core" depends on TEGRA_SILICON_PLATFORM depends on TEGRA_CPU_DVFS default y config TEGRA_IOVMM_GART bool "Enable I/O virtual memory manager for GART" depends on ARCH_TEGRA_2x_SOC default y select TEGRA_IOVMM help Enables support for remapping discontiguous physical memory shared with the operating system into contiguous I/O virtual space through the GART hardware included on Tegra SoCs config TEGRA_IOVMM_SMMU bool "Enable I/O virtual memory manager for SMMU" depends on ARCH_TEGRA_3x_SOC default y select TEGRA_IOVMM help Enables support for remapping discontiguous physical memory shared with the operating system into contiguous I/O virtual space through the SMMU hardware included on Tegra SoCs config TEGRA_IOVMM_SMMU_SYSFS bool "Enable SMMU register access for debugging" depends on TEGRA_IOVMM_SMMU default n help Enables SMMU register access through /sys/devices/smmu/* files. config TEGRA_IOVMM bool config TEGRA_AVP_KERNEL_ON_MMU bool "Use AVP MMU to relocate AVP kernel" depends on ARCH_TEGRA_2x_SOC default y help Use AVP MMU to relocate AVP kernel (nvrm_avp.bin). config TEGRA_AVP_KERNEL_ON_SMMU bool "Use SMMU to relocate AVP kernel" depends on TEGRA_IOVMM_SMMU default y help Use SMMU to relocate AVP kernel (nvrm_avp.bin). config TEGRA_ARB_SEMAPHORE bool config TEGRA_THERMAL_THROTTLE bool "Enable throttling of CPU speed on overtemp" depends on TEGRA_SILICON_PLATFORM depends on CPU_FREQ default y help Also requires enabling a temperature sensor such as NCT1008. config TEGRA_CLOCK_DEBUG_WRITE bool "Enable debugfs write access to clock tree" depends on DEBUG_FS default n config TEGRA_AUTO_HOTPLUG bool "Enable automatic CPU hot-plugging" depends on HOTPLUG_CPU && CPU_FREQ && !ARCH_CPU_PROBE_RELEASE default y help This option enables turning CPUs off/on and switching tegra high/low power CPU clusters automatically, corresponding to CPU frequency scaling. config TEGRA_MC_PROFILE tristate "Enable profiling memory controller utilization" default n help When enabled, provides a mechanism to perform statistical sampling of the memory controller usage on a client-by-client basis, and report the log through sysfs. config TEGRA_EDP_LIMITS bool "Enforce electrical design limits" depends on TEGRA_SILICON_PLATFORM depends on CPU_FREQ default y if ARCH_TEGRA_3x_SOC default n help Limit maximum CPU frequency based on temperature and number of on-line CPUs to keep CPU rail current within power supply capabilities. config TEGRA_REG_ACCESS bool "Enable accessing Tegra Registers from user space" default n help When enabled, the /dev/tegra_reg_access node is created, which allows accessing Tegra Registers from user space. This is for test purpose only. This should not be enabled in production builds. config TEGRA_EMC_TO_DDR_CLOCK int "EMC to DDR clocks ratio" default "2" if ARCH_TEGRA_2x_SOC default "1" config TEGRA_CONVSERVATIVE_GOV_ON_EARLYSUPSEND bool "Use conservative cpu frequency governor when device enters early suspend" depends on HAS_EARLYSUSPEND && CPU_FREQ default n help Also will restore to original cpu frequency governor when device is resumed config TEGRA_STAT_MON bool "Enable H/W statistics monitor" depends on ARCH_TEGRA_2x_SOC default n help Enables support for hardware statistics monitor for AVP. config USB_HOTPLUG bool "Enabling the USB hotplug" default n config TEGRA_DYNAMIC_PWRDET bool "Enable dynamic activation of IO level auto-detection" depends on TEGRA_SILICON_PLATFORM default n help This option allows turning off tegra IO level auto-detection when IO power is stable. If set auto-detection cells are active only during power transitions, otherwise, the cells are active always config TEGRA_EDP_EXACT_FREQ bool "Use maximum possible cpu frequency when EDP capping" depends on TEGRA_EDP_LIMITS default y help When enabled the cpu will run at the exact frequency specified in the EDP table when EDP capping is applied; when disabled the next lower cpufreq frequency will be used.