/*
 * Copyright (C) 2013 Toradex, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
 * 02111-1307, USA
 */

#include <linux/kernel.h>
#include <linux/init.h>

#include "board.h"
#include "board-apalis_t30.h"
#include "tegra3_emc.h"
#include "fuse.h"

#if 0
static const struct tegra_emc_table cardhu_emc_tables_h5tc2g_a2[] = {
	{
		0x32,       /* Rev 3.2 */
		25500,      /* SDRAM frequency */
		{
			0x00000001, /* EMC_RC */
			0x00000003, /* EMC_RFC */
			0x00000000, /* EMC_RAS */
			0x00000000, /* EMC_RP */
			0x00000002, /* EMC_R2W */
			0x0000000a, /* EMC_W2R */
			0x00000003, /* EMC_R2P */
			0x0000000b, /* EMC_W2P */
			0x00000000, /* EMC_RD_RCD */
			0x00000000, /* EMC_WR_RCD */
			0x00000003, /* EMC_RRD */
			0x00000001, /* EMC_REXT */
			0x00000000, /* EMC_WEXT */
			0x00000005, /* EMC_WDV */
			0x00000005, /* EMC_QUSE */
			0x00000004, /* EMC_QRST */
			0x00000007, /* EMC_QSAFE */
			0x0000000c, /* EMC_RDV */
			0x000000bd, /* EMC_REFRESH */
			0x00000000, /* EMC_BURST_REFRESH_NUM */
			0x0000002f, /* EMC_PRE_REFRESH_REQ_CNT */
			0x00000002, /* EMC_PDEX2WR */
			0x00000002, /* EMC_PDEX2RD */
			0x00000001, /* EMC_PCHG2PDEN */
			0x00000000, /* EMC_ACT2PDEN */
			0x00000007, /* EMC_AR2PDEN */
			0x0000000f, /* EMC_RW2PDEN */
			0x00000005, /* EMC_TXSR */
			0x00000005, /* EMC_TXSRDLL */
			0x00000004, /* EMC_TCKE */
			0x00000001, /* EMC_TFAW */
			0x00000000, /* EMC_TRPAB */
			0x00000004, /* EMC_TCLKSTABLE */
			0x00000005, /* EMC_TCLKSTOP */
			0x000000c3, /* EMC_TREFBW */
			0x00000000, /* EMC_QUSE_EXTRA */
			0x00000004, /* EMC_FBIO_CFG6 */
			0x00000000, /* EMC_ODT_WRITE */
			0x00000000, /* EMC_ODT_READ */
			0x00006288, /* EMC_FBIO_CFG5 */
			0x007800a4, /* EMC_CFG_DIG_DLL */
			0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
			0x00080000, /* EMC_DLL_XFORM_DQS0 */
			0x00080000, /* EMC_DLL_XFORM_DQS1 */
			0x00080000, /* EMC_DLL_XFORM_DQS2 */
			0x00080000, /* EMC_DLL_XFORM_DQS3 */
			0x00080000, /* EMC_DLL_XFORM_DQS4 */
			0x00080000, /* EMC_DLL_XFORM_DQS5 */
			0x00080000, /* EMC_DLL_XFORM_DQS6 */
			0x00080000, /* EMC_DLL_XFORM_DQS7 */
			0x00000000, /* EMC_DLL_XFORM_QUSE0 */
			0x00000000, /* EMC_DLL_XFORM_QUSE1 */
			0x00000000, /* EMC_DLL_XFORM_QUSE2 */
			0x00000000, /* EMC_DLL_XFORM_QUSE3 */
			0x00000000, /* EMC_DLL_XFORM_QUSE4 */
			0x00000000, /* EMC_DLL_XFORM_QUSE5 */
			0x00000000, /* EMC_DLL_XFORM_QUSE6 */
			0x00000000, /* EMC_DLL_XFORM_QUSE7 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
			0x00080000, /* EMC_DLL_XFORM_DQ0 */
			0x00080000, /* EMC_DLL_XFORM_DQ1 */
			0x00080000, /* EMC_DLL_XFORM_DQ2 */
			0x00080000, /* EMC_DLL_XFORM_DQ3 */
			0x000002a0, /* EMC_XM2CMDPADCTRL */
			0x0800211c, /* EMC_XM2DQSPADCTRL2 */
			0x00000000, /* EMC_XM2DQPADCTRL2 */
			0x77ffc084, /* EMC_XM2CLKPADCTRL */
			0x01f1f108, /* EMC_XM2COMPPADCTRL */
			0x05057404, /* EMC_XM2VTTGENPADCTRL */
			0x54000007, /* EMC_XM2VTTGENPADCTRL2 */
			0x08000168, /* EMC_XM2QUSEPADCTRL */
			0x08000000, /* EMC_XM2DQSPADCTRL3 */
			0x00000802, /* EMC_CTT_TERM_CTRL */
			0x00000000, /* EMC_ZCAL_INTERVAL */
			0x00000040, /* EMC_ZCAL_WAIT_CNT */
			0x000c000c, /* EMC_MRS_WAIT_CNT */
			0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
			0x00000000, /* EMC_CTT */
			0x00000000, /* EMC_CTT_DURATION */
			0x80000280, /* EMC_DYN_SELF_REF_CONTROL */
			0x00030003, /* MC_EMEM_ARB_CFG */
			0xc0000010, /* MC_EMEM_ARB_OUTSTANDING_REQ */
			0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
			0x00000001, /* MC_EMEM_ARB_TIMING_RP */
			0x00000002, /* MC_EMEM_ARB_TIMING_RC */
			0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
			0x00000001, /* MC_EMEM_ARB_TIMING_FAW */
			0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
			0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
			0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
			0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
			0x00000001, /* MC_EMEM_ARB_TIMING_W2W */
			0x00000002, /* MC_EMEM_ARB_TIMING_R2W */
			0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
			0x06020102, /* MC_EMEM_ARB_DA_TURNS */
			0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
			0x74430303, /* MC_EMEM_ARB_MISC0 */
			0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
			0xd8000000, /* EMC_FBIO_SPARE */
			0xff00ff00, /* EMC_CFG_RSV */
		},
		0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
		0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
		0x00000000, /* EMC_CFG.PERIODIC_QRST */
		0x80001221, /* Mode Register 0 */
		0x80100003, /* Mode Register 1 */
		0x80200008, /* Mode Register 2 */
		0x00000001, /* EMC_CFG.DYN_SELF_REF */
	},
	{
		0x32,       /* Rev 3.2 */
		51000,      /* SDRAM frequency */
		{
			0x00000002, /* EMC_RC */
			0x00000008, /* EMC_RFC */
			0x00000001, /* EMC_RAS */
			0x00000000, /* EMC_RP */
			0x00000002, /* EMC_R2W */
			0x0000000a, /* EMC_W2R */
			0x00000003, /* EMC_R2P */
			0x0000000b, /* EMC_W2P */
			0x00000000, /* EMC_RD_RCD */
			0x00000000, /* EMC_WR_RCD */
			0x00000003, /* EMC_RRD */
			0x00000001, /* EMC_REXT */
			0x00000000, /* EMC_WEXT */
			0x00000005, /* EMC_WDV */
			0x00000005, /* EMC_QUSE */
			0x00000004, /* EMC_QRST */
			0x00000007, /* EMC_QSAFE */
			0x0000000c, /* EMC_RDV */
			0x00000181, /* EMC_REFRESH */
			0x00000000, /* EMC_BURST_REFRESH_NUM */
			0x00000060, /* EMC_PRE_REFRESH_REQ_CNT */
			0x00000002, /* EMC_PDEX2WR */
			0x00000002, /* EMC_PDEX2RD */
			0x00000001, /* EMC_PCHG2PDEN */
			0x00000000, /* EMC_ACT2PDEN */
			0x00000007, /* EMC_AR2PDEN */
			0x0000000f, /* EMC_RW2PDEN */
			0x00000009, /* EMC_TXSR */
			0x00000009, /* EMC_TXSRDLL */
			0x00000004, /* EMC_TCKE */
			0x00000002, /* EMC_TFAW */
			0x00000000, /* EMC_TRPAB */
			0x00000004, /* EMC_TCLKSTABLE */
			0x00000005, /* EMC_TCLKSTOP */
			0x0000018e, /* EMC_TREFBW */
			0x00000000, /* EMC_QUSE_EXTRA */
			0x00000004, /* EMC_FBIO_CFG6 */
			0x00000000, /* EMC_ODT_WRITE */
			0x00000000, /* EMC_ODT_READ */
			0x00006288, /* EMC_FBIO_CFG5 */
			0x007800a4, /* EMC_CFG_DIG_DLL */
			0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
			0x00080000, /* EMC_DLL_XFORM_DQS0 */
			0x00080000, /* EMC_DLL_XFORM_DQS1 */
			0x00080000, /* EMC_DLL_XFORM_DQS2 */
			0x00080000, /* EMC_DLL_XFORM_DQS3 */
			0x00080000, /* EMC_DLL_XFORM_DQS4 */
			0x00080000, /* EMC_DLL_XFORM_DQS5 */
			0x00080000, /* EMC_DLL_XFORM_DQS6 */
			0x00080000, /* EMC_DLL_XFORM_DQS7 */
			0x00000000, /* EMC_DLL_XFORM_QUSE0 */
			0x00000000, /* EMC_DLL_XFORM_QUSE1 */
			0x00000000, /* EMC_DLL_XFORM_QUSE2 */
			0x00000000, /* EMC_DLL_XFORM_QUSE3 */
			0x00000000, /* EMC_DLL_XFORM_QUSE4 */
			0x00000000, /* EMC_DLL_XFORM_QUSE5 */
			0x00000000, /* EMC_DLL_XFORM_QUSE6 */
			0x00000000, /* EMC_DLL_XFORM_QUSE7 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
			0x00080000, /* EMC_DLL_XFORM_DQ0 */
			0x00080000, /* EMC_DLL_XFORM_DQ1 */
			0x00080000, /* EMC_DLL_XFORM_DQ2 */
			0x00080000, /* EMC_DLL_XFORM_DQ3 */
			0x000002a0, /* EMC_XM2CMDPADCTRL */
			0x0800211c, /* EMC_XM2DQSPADCTRL2 */
			0x00000000, /* EMC_XM2DQPADCTRL2 */
			0x77ffc084, /* EMC_XM2CLKPADCTRL */
			0x01f1f108, /* EMC_XM2COMPPADCTRL */
			0x05057404, /* EMC_XM2VTTGENPADCTRL */
			0x54000007, /* EMC_XM2VTTGENPADCTRL2 */
			0x08000168, /* EMC_XM2QUSEPADCTRL */
			0x08000000, /* EMC_XM2DQSPADCTRL3 */
			0x00000802, /* EMC_CTT_TERM_CTRL */
			0x00000000, /* EMC_ZCAL_INTERVAL */
			0x00000040, /* EMC_ZCAL_WAIT_CNT */
			0x000c000c, /* EMC_MRS_WAIT_CNT */
			0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
			0x00000000, /* EMC_CTT */
			0x00000000, /* EMC_CTT_DURATION */
			0x8000040b, /* EMC_DYN_SELF_REF_CONTROL */
			0x00010003, /* MC_EMEM_ARB_CFG */
			0xc0000010, /* MC_EMEM_ARB_OUTSTANDING_REQ */
			0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
			0x00000001, /* MC_EMEM_ARB_TIMING_RP */
			0x00000002, /* MC_EMEM_ARB_TIMING_RC */
			0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
			0x00000001, /* MC_EMEM_ARB_TIMING_FAW */
			0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
			0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
			0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
			0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
			0x00000001, /* MC_EMEM_ARB_TIMING_W2W */
			0x00000002, /* MC_EMEM_ARB_TIMING_R2W */
			0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
			0x06020102, /* MC_EMEM_ARB_DA_TURNS */
			0x000a0402, /* MC_EMEM_ARB_DA_COVERS */
			0x73430303, /* MC_EMEM_ARB_MISC0 */
			0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
			0xd8000000, /* EMC_FBIO_SPARE */
			0xff00ff00, /* EMC_CFG_RSV */
		},
		0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
		0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
		0x00000000, /* EMC_CFG.PERIODIC_QRST */
		0x80001221, /* Mode Register 0 */
		0x80100003, /* Mode Register 1 */
		0x80200008, /* Mode Register 2 */
		0x00000001, /* EMC_CFG.DYN_SELF_REF */
	},
	{
		0x32,       /* Rev 3.2 */
		102000,     /* SDRAM frequency */
		{
			0x00000004, /* EMC_RC */
			0x00000010, /* EMC_RFC */
			0x00000003, /* EMC_RAS */
			0x00000001, /* EMC_RP */
			0x00000002, /* EMC_R2W */
			0x0000000a, /* EMC_W2R */
			0x00000003, /* EMC_R2P */
			0x0000000b, /* EMC_W2P */
			0x00000001, /* EMC_RD_RCD */
			0x00000001, /* EMC_WR_RCD */
			0x00000003, /* EMC_RRD */
			0x00000001, /* EMC_REXT */
			0x00000000, /* EMC_WEXT */
			0x00000005, /* EMC_WDV */
			0x00000005, /* EMC_QUSE */
			0x00000004, /* EMC_QRST */
			0x00000007, /* EMC_QSAFE */
			0x0000000c, /* EMC_RDV */
			0x00000303, /* EMC_REFRESH */
			0x00000000, /* EMC_BURST_REFRESH_NUM */
			0x000000c0, /* EMC_PRE_REFRESH_REQ_CNT */
			0x00000002, /* EMC_PDEX2WR */
			0x00000002, /* EMC_PDEX2RD */
			0x00000001, /* EMC_PCHG2PDEN */
			0x00000000, /* EMC_ACT2PDEN */
			0x00000007, /* EMC_AR2PDEN */
			0x0000000f, /* EMC_RW2PDEN */
			0x00000012, /* EMC_TXSR */
			0x00000012, /* EMC_TXSRDLL */
			0x00000004, /* EMC_TCKE */
			0x00000004, /* EMC_TFAW */
			0x00000000, /* EMC_TRPAB */
			0x00000004, /* EMC_TCLKSTABLE */
			0x00000005, /* EMC_TCLKSTOP */
			0x0000031c, /* EMC_TREFBW */
			0x00000000, /* EMC_QUSE_EXTRA */
			0x00000004, /* EMC_FBIO_CFG6 */
			0x00000000, /* EMC_ODT_WRITE */
			0x00000000, /* EMC_ODT_READ */
			0x00006288, /* EMC_FBIO_CFG5 */
			0x007800a4, /* EMC_CFG_DIG_DLL */
			0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
			0x00080000, /* EMC_DLL_XFORM_DQS0 */
			0x00080000, /* EMC_DLL_XFORM_DQS1 */
			0x00080000, /* EMC_DLL_XFORM_DQS2 */
			0x00080000, /* EMC_DLL_XFORM_DQS3 */
			0x00080000, /* EMC_DLL_XFORM_DQS4 */
			0x00080000, /* EMC_DLL_XFORM_DQS5 */
			0x00080000, /* EMC_DLL_XFORM_DQS6 */
			0x00080000, /* EMC_DLL_XFORM_DQS7 */
			0x00000000, /* EMC_DLL_XFORM_QUSE0 */
			0x00000000, /* EMC_DLL_XFORM_QUSE1 */
			0x00000000, /* EMC_DLL_XFORM_QUSE2 */
			0x00000000, /* EMC_DLL_XFORM_QUSE3 */
			0x00000000, /* EMC_DLL_XFORM_QUSE4 */
			0x00000000, /* EMC_DLL_XFORM_QUSE5 */
			0x00000000, /* EMC_DLL_XFORM_QUSE6 */
			0x00000000, /* EMC_DLL_XFORM_QUSE7 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
			0x00080000, /* EMC_DLL_XFORM_DQ0 */
			0x00080000, /* EMC_DLL_XFORM_DQ1 */
			0x00080000, /* EMC_DLL_XFORM_DQ2 */
			0x00080000, /* EMC_DLL_XFORM_DQ3 */
			0x000002a0, /* EMC_XM2CMDPADCTRL */
			0x0800211c, /* EMC_XM2DQSPADCTRL2 */
			0x00000000, /* EMC_XM2DQPADCTRL2 */
			0x77ffc084, /* EMC_XM2CLKPADCTRL */
			0x01f1f108, /* EMC_XM2COMPPADCTRL */
			0x05057404, /* EMC_XM2VTTGENPADCTRL */
			0x54000007, /* EMC_XM2VTTGENPADCTRL2 */
			0x08000168, /* EMC_XM2QUSEPADCTRL */
			0x08000000, /* EMC_XM2DQSPADCTRL3 */
			0x00000802, /* EMC_CTT_TERM_CTRL */
			0x00000000, /* EMC_ZCAL_INTERVAL */
			0x00000040, /* EMC_ZCAL_WAIT_CNT */
			0x000c000c, /* EMC_MRS_WAIT_CNT */
			0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
			0x00000000, /* EMC_CTT */
			0x00000000, /* EMC_CTT_DURATION */
			0x80000713, /* EMC_DYN_SELF_REF_CONTROL */
			0x00000003, /* MC_EMEM_ARB_CFG */
			0xc0000018, /* MC_EMEM_ARB_OUTSTANDING_REQ */
			0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
			0x00000001, /* MC_EMEM_ARB_TIMING_RP */
			0x00000003, /* MC_EMEM_ARB_TIMING_RC */
			0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
			0x00000001, /* MC_EMEM_ARB_TIMING_FAW */
			0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
			0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
			0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
			0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
			0x00000001, /* MC_EMEM_ARB_TIMING_W2W */
			0x00000002, /* MC_EMEM_ARB_TIMING_R2W */
			0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
			0x06020102, /* MC_EMEM_ARB_DA_TURNS */
			0x000a0403, /* MC_EMEM_ARB_DA_COVERS */
			0x72830504, /* MC_EMEM_ARB_MISC0 */
			0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
			0xd8000000, /* EMC_FBIO_SPARE */
			0xff00ff00, /* EMC_CFG_RSV */
		},
		0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
		0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
		0x00000000, /* EMC_CFG.PERIODIC_QRST */
		0x80001221, /* Mode Register 0 */
		0x80100003, /* Mode Register 1 */
		0x80200008, /* Mode Register 2 */
		0x00000001, /* EMC_CFG.DYN_SELF_REF */
	},
	{
		0x32,       /* Rev 3.2 */
		204000,     /* SDRAM frequency */
		{
			0x00000009, /* EMC_RC */
			0x00000020, /* EMC_RFC */
			0x00000007, /* EMC_RAS */
			0x00000002, /* EMC_RP */
			0x00000002, /* EMC_R2W */
			0x0000000a, /* EMC_W2R */
			0x00000005, /* EMC_R2P */
			0x0000000b, /* EMC_W2P */
			0x00000002, /* EMC_RD_RCD */
			0x00000002, /* EMC_WR_RCD */
			0x00000003, /* EMC_RRD */
			0x00000001, /* EMC_REXT */
			0x00000000, /* EMC_WEXT */
			0x00000005, /* EMC_WDV */
			0x00000005, /* EMC_QUSE */
			0x00000004, /* EMC_QRST */
			0x00000009, /* EMC_QSAFE */
			0x0000000b, /* EMC_RDV */
			0x00000607, /* EMC_REFRESH */
			0x00000000, /* EMC_BURST_REFRESH_NUM */
			0x00000181, /* EMC_PRE_REFRESH_REQ_CNT */
			0x00000002, /* EMC_PDEX2WR */
			0x00000002, /* EMC_PDEX2RD */
			0x00000001, /* EMC_PCHG2PDEN */
			0x00000000, /* EMC_ACT2PDEN */
			0x00000007, /* EMC_AR2PDEN */
			0x0000000f, /* EMC_RW2PDEN */
			0x00000023, /* EMC_TXSR */
			0x00000023, /* EMC_TXSRDLL */
			0x00000004, /* EMC_TCKE */
			0x00000007, /* EMC_TFAW */
			0x00000000, /* EMC_TRPAB */
			0x00000004, /* EMC_TCLKSTABLE */
			0x00000005, /* EMC_TCLKSTOP */
			0x00000638, /* EMC_TREFBW */
			0x00000006, /* EMC_QUSE_EXTRA */
			0x00000004, /* EMC_FBIO_CFG6 */
			0x00000000, /* EMC_ODT_WRITE */
			0x00000000, /* EMC_ODT_READ */
			0x00004288, /* EMC_FBIO_CFG5 */
			0x004400a4, /* EMC_CFG_DIG_DLL */
			0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
			0x00080000, /* EMC_DLL_XFORM_DQS0 */
			0x00080000, /* EMC_DLL_XFORM_DQS1 */
			0x00080000, /* EMC_DLL_XFORM_DQS2 */
			0x00080000, /* EMC_DLL_XFORM_DQS3 */
			0x00080000, /* EMC_DLL_XFORM_DQS4 */
			0x00080000, /* EMC_DLL_XFORM_DQS5 */
			0x00080000, /* EMC_DLL_XFORM_DQS6 */
			0x00080000, /* EMC_DLL_XFORM_DQS7 */
			0x00000000, /* EMC_DLL_XFORM_QUSE0 */
			0x00000000, /* EMC_DLL_XFORM_QUSE1 */
			0x00000000, /* EMC_DLL_XFORM_QUSE2 */
			0x00000000, /* EMC_DLL_XFORM_QUSE3 */
			0x00000000, /* EMC_DLL_XFORM_QUSE4 */
			0x00000000, /* EMC_DLL_XFORM_QUSE5 */
			0x00000000, /* EMC_DLL_XFORM_QUSE6 */
			0x00000000, /* EMC_DLL_XFORM_QUSE7 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
			0x00080000, /* EMC_DLL_XFORM_DQ0 */
			0x00080000, /* EMC_DLL_XFORM_DQ1 */
			0x00080000, /* EMC_DLL_XFORM_DQ2 */
			0x00080000, /* EMC_DLL_XFORM_DQ3 */
			0x000002a0, /* EMC_XM2CMDPADCTRL */
			0x0800211c, /* EMC_XM2DQSPADCTRL2 */
			0x00000000, /* EMC_XM2DQPADCTRL2 */
			0x77fff884, /* EMC_XM2CLKPADCTRL */
			0x01f1f108, /* EMC_XM2COMPPADCTRL */
			0x05057404, /* EMC_XM2VTTGENPADCTRL */
			0x54000007, /* EMC_XM2VTTGENPADCTRL2 */
			0x08000168, /* EMC_XM2QUSEPADCTRL */
			0x08000000, /* EMC_XM2DQSPADCTRL3 */
			0x00000802, /* EMC_CTT_TERM_CTRL */
			0x00020000, /* EMC_ZCAL_INTERVAL */
			0x00000100, /* EMC_ZCAL_WAIT_CNT */
			0x000c000c, /* EMC_MRS_WAIT_CNT */
			0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
			0x00000000, /* EMC_CTT */
			0x00000000, /* EMC_CTT_DURATION */
			0x80000d22, /* EMC_DYN_SELF_REF_CONTROL */
			0x00000006, /* MC_EMEM_ARB_CFG */
			0xc0000025, /* MC_EMEM_ARB_OUTSTANDING_REQ */
			0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
			0x00000001, /* MC_EMEM_ARB_TIMING_RP */
			0x00000005, /* MC_EMEM_ARB_TIMING_RC */
			0x00000002, /* MC_EMEM_ARB_TIMING_RAS */
			0x00000003, /* MC_EMEM_ARB_TIMING_FAW */
			0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
			0x00000003, /* MC_EMEM_ARB_TIMING_RAP2PRE */
			0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
			0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
			0x00000001, /* MC_EMEM_ARB_TIMING_W2W */
			0x00000002, /* MC_EMEM_ARB_TIMING_R2W */
			0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
			0x06020102, /* MC_EMEM_ARB_DA_TURNS */
			0x000a0505, /* MC_EMEM_ARB_DA_COVERS */
			0x72440a06, /* MC_EMEM_ARB_MISC0 */
			0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
			0xe8000000, /* EMC_FBIO_SPARE */
			0xff00ff00, /* EMC_CFG_RSV */
		},
		0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
		0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
		0x00000001, /* EMC_CFG.PERIODIC_QRST */
		0x80001221, /* Mode Register 0 */
		0x80100003, /* Mode Register 1 */
		0x80200008, /* Mode Register 2 */
		0x00000001, /* EMC_CFG.DYN_SELF_REF */
	},
	{
		0x32,       /* Rev 3.2 */
		375000,     /* SDRAM frequency */
		{
			0x00000011, /* EMC_RC */
			0x0000003a, /* EMC_RFC */
			0x0000000c, /* EMC_RAS */
			0x00000004, /* EMC_RP */
			0x00000003, /* EMC_R2W */
			0x00000008, /* EMC_W2R */
			0x00000002, /* EMC_R2P */
			0x0000000a, /* EMC_W2P */
			0x00000004, /* EMC_RD_RCD */
			0x00000004, /* EMC_WR_RCD */
			0x00000002, /* EMC_RRD */
			0x00000001, /* EMC_REXT */
			0x00000000, /* EMC_WEXT */
			0x00000004, /* EMC_WDV */
			0x00000006, /* EMC_QUSE */
			0x00000004, /* EMC_QRST */
			0x00000008, /* EMC_QSAFE */
			0x0000000d, /* EMC_RDV */
			0x00000b2d, /* EMC_REFRESH */
			0x00000000, /* EMC_BURST_REFRESH_NUM */
			0x000002cb, /* EMC_PRE_REFRESH_REQ_CNT */
			0x00000008, /* EMC_PDEX2WR */
			0x00000008, /* EMC_PDEX2RD */
			0x00000001, /* EMC_PCHG2PDEN */
			0x00000000, /* EMC_ACT2PDEN */
			0x00000007, /* EMC_AR2PDEN */
			0x0000000f, /* EMC_RW2PDEN */
			0x00000040, /* EMC_TXSR */
			0x00000200, /* EMC_TXSRDLL */
			0x00000009, /* EMC_TCKE */
			0x0000000c, /* EMC_TFAW */
			0x00000000, /* EMC_TRPAB */
			0x00000004, /* EMC_TCLKSTABLE */
			0x00000005, /* EMC_TCLKSTOP */
			0x00000b6d, /* EMC_TREFBW */
			0x00000000, /* EMC_QUSE_EXTRA */
			0x00000006, /* EMC_FBIO_CFG6 */
			0x00000000, /* EMC_ODT_WRITE */
			0x00000000, /* EMC_ODT_READ */
			0x00007088, /* EMC_FBIO_CFG5 */
			0x00200084, /* EMC_CFG_DIG_DLL */
			0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
			0x0003c000, /* EMC_DLL_XFORM_DQS0 */
			0x0003c000, /* EMC_DLL_XFORM_DQS1 */
			0x0003c000, /* EMC_DLL_XFORM_DQS2 */
			0x0003c000, /* EMC_DLL_XFORM_DQS3 */
			0x0003c000, /* EMC_DLL_XFORM_DQS4 */
			0x0003c000, /* EMC_DLL_XFORM_DQS5 */
			0x0003c000, /* EMC_DLL_XFORM_DQS6 */
			0x0003c000, /* EMC_DLL_XFORM_DQS7 */
			0x00000000, /* EMC_DLL_XFORM_QUSE0 */
			0x00000000, /* EMC_DLL_XFORM_QUSE1 */
			0x00000000, /* EMC_DLL_XFORM_QUSE2 */
			0x00000000, /* EMC_DLL_XFORM_QUSE3 */
			0x00000000, /* EMC_DLL_XFORM_QUSE4 */
			0x00000000, /* EMC_DLL_XFORM_QUSE5 */
			0x00000000, /* EMC_DLL_XFORM_QUSE6 */
			0x00000000, /* EMC_DLL_XFORM_QUSE7 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
			0x00040000, /* EMC_DLL_XFORM_DQ0 */
			0x00040000, /* EMC_DLL_XFORM_DQ1 */
			0x00040000, /* EMC_DLL_XFORM_DQ2 */
			0x00040000, /* EMC_DLL_XFORM_DQ3 */
			0x000002a0, /* EMC_XM2CMDPADCTRL */
			0x0800013d, /* EMC_XM2DQSPADCTRL2 */
			0x00000000, /* EMC_XM2DQPADCTRL2 */
			0x77fff884, /* EMC_XM2CLKPADCTRL */
			0x01f1f508, /* EMC_XM2COMPPADCTRL */
			0x05057404, /* EMC_XM2VTTGENPADCTRL */
			0x54000007, /* EMC_XM2VTTGENPADCTRL2 */
			0x080001e8, /* EMC_XM2QUSEPADCTRL */
			0x08000021, /* EMC_XM2DQSPADCTRL3 */
			0x00000802, /* EMC_CTT_TERM_CTRL */
			0x00020000, /* EMC_ZCAL_INTERVAL */
			0x00000100, /* EMC_ZCAL_WAIT_CNT */
			0x0184000c, /* EMC_MRS_WAIT_CNT */
			0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
			0x00000000, /* EMC_CTT */
			0x00000000, /* EMC_CTT_DURATION */
			0x8000174b, /* EMC_DYN_SELF_REF_CONTROL */
			0x0000000b, /* MC_EMEM_ARB_CFG */
			0xc0000044, /* MC_EMEM_ARB_OUTSTANDING_REQ */
			0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
			0x00000002, /* MC_EMEM_ARB_TIMING_RP */
			0x00000009, /* MC_EMEM_ARB_TIMING_RC */
			0x00000005, /* MC_EMEM_ARB_TIMING_RAS */
			0x00000005, /* MC_EMEM_ARB_TIMING_FAW */
			0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
			0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
			0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
			0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
			0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
			0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
			0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
			0x06030202, /* MC_EMEM_ARB_DA_TURNS */
			0x000d0709, /* MC_EMEM_ARB_DA_COVERS */
			0x75c6110a, /* MC_EMEM_ARB_MISC0 */
			0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
			0x58000000, /* EMC_FBIO_SPARE */
			0xff00ff88, /* EMC_CFG_RSV */
		},
		0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
		0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
		0x00000000, /* EMC_CFG.PERIODIC_QRST */
		0x80000521, /* Mode Register 0 */
		0x80100002, /* Mode Register 1 */
		0x80200000, /* Mode Register 2 */
		0x00000000, /* EMC_CFG.DYN_SELF_REF */
	},
	{
		0x32,       /* Rev 3.2 */
		400000,     /* SDRAM frequency */
		{
			0x00000012, /* EMC_RC */
			0x00000040, /* EMC_RFC */
			0x0000000d, /* EMC_RAS */
			0x00000004, /* EMC_RP */
			0x00000002, /* EMC_R2W */
			0x00000009, /* EMC_W2R */
			0x00000002, /* EMC_R2P */
			0x0000000c, /* EMC_W2P */
			0x00000004, /* EMC_RD_RCD */
			0x00000004, /* EMC_WR_RCD */
			0x00000002, /* EMC_RRD */
			0x00000001, /* EMC_REXT */
			0x00000000, /* EMC_WEXT */
			0x00000005, /* EMC_WDV */
			0x00000007, /* EMC_QUSE */
			0x00000005, /* EMC_QRST */
			0x00000008, /* EMC_QSAFE */
			0x0000000e, /* EMC_RDV */
			0x00000c2e, /* EMC_REFRESH */
			0x00000000, /* EMC_BURST_REFRESH_NUM */
			0x0000030b, /* EMC_PRE_REFRESH_REQ_CNT */
			0x00000008, /* EMC_PDEX2WR */
			0x00000008, /* EMC_PDEX2RD */
			0x00000001, /* EMC_PCHG2PDEN */
			0x00000000, /* EMC_ACT2PDEN */
			0x00000008, /* EMC_AR2PDEN */
			0x00000011, /* EMC_RW2PDEN */
			0x00000046, /* EMC_TXSR */
			0x00000200, /* EMC_TXSRDLL */
			0x0000000a, /* EMC_TCKE */
			0x0000000d, /* EMC_TFAW */
			0x00000000, /* EMC_TRPAB */
			0x00000004, /* EMC_TCLKSTABLE */
			0x00000005, /* EMC_TCLKSTOP */
			0x00000c6f, /* EMC_TREFBW */
			0x00000000, /* EMC_QUSE_EXTRA */
			0x00000006, /* EMC_FBIO_CFG6 */
			0x00000000, /* EMC_ODT_WRITE */
			0x00000000, /* EMC_ODT_READ */
			0x00007088, /* EMC_FBIO_CFG5 */
			0x001c0084, /* EMC_CFG_DIG_DLL */
			0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
			0x00034000, /* EMC_DLL_XFORM_DQS0 */
			0x00034000, /* EMC_DLL_XFORM_DQS1 */
			0x00034000, /* EMC_DLL_XFORM_DQS2 */
			0x00034000, /* EMC_DLL_XFORM_DQS3 */
			0x00034000, /* EMC_DLL_XFORM_DQS4 */
			0x00034000, /* EMC_DLL_XFORM_DQS5 */
			0x00034000, /* EMC_DLL_XFORM_DQS6 */
			0x00034000, /* EMC_DLL_XFORM_DQS7 */
			0x00000000, /* EMC_DLL_XFORM_QUSE0 */
			0x00000000, /* EMC_DLL_XFORM_QUSE1 */
			0x00000000, /* EMC_DLL_XFORM_QUSE2 */
			0x00000000, /* EMC_DLL_XFORM_QUSE3 */
			0x00000000, /* EMC_DLL_XFORM_QUSE4 */
			0x00000000, /* EMC_DLL_XFORM_QUSE5 */
			0x00000000, /* EMC_DLL_XFORM_QUSE6 */
			0x00000000, /* EMC_DLL_XFORM_QUSE7 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
			0x00040000, /* EMC_DLL_XFORM_DQ0 */
			0x00040000, /* EMC_DLL_XFORM_DQ1 */
			0x00040000, /* EMC_DLL_XFORM_DQ2 */
			0x00040000, /* EMC_DLL_XFORM_DQ3 */
			0x000002a0, /* EMC_XM2CMDPADCTRL */
			0x0800013d, /* EMC_XM2DQSPADCTRL2 */
			0x00000000, /* EMC_XM2DQPADCTRL2 */
			0x77fff884, /* EMC_XM2CLKPADCTRL */
			0x01f1f508, /* EMC_XM2COMPPADCTRL */
			0x05057404, /* EMC_XM2VTTGENPADCTRL */
			0x54000007, /* EMC_XM2VTTGENPADCTRL2 */
			0x080001e8, /* EMC_XM2QUSEPADCTRL */
			0x08000021, /* EMC_XM2DQSPADCTRL3 */
			0x00000802, /* EMC_CTT_TERM_CTRL */
			0x00020000, /* EMC_ZCAL_INTERVAL */
			0x00000100, /* EMC_ZCAL_WAIT_CNT */
			0x017f000c, /* EMC_MRS_WAIT_CNT */
			0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
			0x00000000, /* EMC_CTT */
			0x00000000, /* EMC_CTT_DURATION */
			0x80001941, /* EMC_DYN_SELF_REF_CONTROL */
			0x0000000c, /* MC_EMEM_ARB_CFG */
			0xc000004a, /* MC_EMEM_ARB_OUTSTANDING_REQ */
			0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
			0x00000002, /* MC_EMEM_ARB_TIMING_RP */
			0x0000000a, /* MC_EMEM_ARB_TIMING_RC */
			0x00000006, /* MC_EMEM_ARB_TIMING_RAS */
			0x00000006, /* MC_EMEM_ARB_TIMING_FAW */
			0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
			0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
			0x00000009, /* MC_EMEM_ARB_TIMING_WAP2PRE */
			0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
			0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
			0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
			0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
			0x06030202, /* MC_EMEM_ARB_DA_TURNS */
			0x000e070a, /* MC_EMEM_ARB_DA_COVERS */
			0x7547130b, /* MC_EMEM_ARB_MISC0 */
			0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
			0x58000000, /* EMC_FBIO_SPARE */
			0xff00ff88, /* EMC_CFG_RSV */
		},
		0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
		0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
		0x00000000, /* EMC_CFG.PERIODIC_QRST */
		0x80000731, /* Mode Register 0 */
		0x80100002, /* Mode Register 1 */
		0x80200008, /* Mode Register 2 */
		0x00000000, /* EMC_CFG.DYN_SELF_REF */
	},
	{
		0x32,       /* Rev 3.2 */
		450000,     /* SDRAM frequency */
		{
			0x00000014, /* EMC_RC */
			0x00000046, /* EMC_RFC */
			0x0000000e, /* EMC_RAS */
			0x00000005, /* EMC_RP */
			0x00000003, /* EMC_R2W */
			0x00000009, /* EMC_W2R */
			0x00000002, /* EMC_R2P */
			0x0000000c, /* EMC_W2P */
			0x00000005, /* EMC_RD_RCD */
			0x00000005, /* EMC_WR_RCD */
			0x00000002, /* EMC_RRD */
			0x00000001, /* EMC_REXT */
			0x00000000, /* EMC_WEXT */
			0x00000005, /* EMC_WDV */
			0x00000007, /* EMC_QUSE */
			0x00000005, /* EMC_QRST */
			0x0000000a, /* EMC_QSAFE */
			0x0000000e, /* EMC_RDV */
			0x00000d76, /* EMC_REFRESH */
			0x00000000, /* EMC_BURST_REFRESH_NUM */
			0x0000035d, /* EMC_PRE_REFRESH_REQ_CNT */
			0x00000001, /* EMC_PDEX2WR */
			0x00000009, /* EMC_PDEX2RD */
			0x00000001, /* EMC_PCHG2PDEN */
			0x00000000, /* EMC_ACT2PDEN */
			0x00000009, /* EMC_AR2PDEN */
			0x00000011, /* EMC_RW2PDEN */
			0x0000004d, /* EMC_TXSR */
			0x00000200, /* EMC_TXSRDLL */
			0x00000004, /* EMC_TCKE */
			0x0000000e, /* EMC_TFAW */
			0x00000000, /* EMC_TRPAB */
			0x00000004, /* EMC_TCLKSTABLE */
			0x00000005, /* EMC_TCLKSTOP */
			0x00000db6, /* EMC_TREFBW */
			0x00000000, /* EMC_QUSE_EXTRA */
			0x00000006, /* EMC_FBIO_CFG6 */
			0x00000000, /* EMC_ODT_WRITE */
			0x00000000, /* EMC_ODT_READ */
			0x00007088, /* EMC_FBIO_CFG5 */
			0x00180084, /* EMC_CFG_DIG_DLL */
			0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
			0x00022000, /* EMC_DLL_XFORM_DQS0 */
			0x00022000, /* EMC_DLL_XFORM_DQS1 */
			0x00022000, /* EMC_DLL_XFORM_DQS2 */
			0x00022000, /* EMC_DLL_XFORM_DQS3 */
			0x00022000, /* EMC_DLL_XFORM_DQS4 */
			0x00022000, /* EMC_DLL_XFORM_DQS5 */
			0x00022000, /* EMC_DLL_XFORM_DQS6 */
			0x00022000, /* EMC_DLL_XFORM_DQS7 */
			0x00000000, /* EMC_DLL_XFORM_QUSE0 */
			0x00000000, /* EMC_DLL_XFORM_QUSE1 */
			0x00000000, /* EMC_DLL_XFORM_QUSE2 */
			0x00000000, /* EMC_DLL_XFORM_QUSE3 */
			0x00000000, /* EMC_DLL_XFORM_QUSE4 */
			0x00000000, /* EMC_DLL_XFORM_QUSE5 */
			0x00000000, /* EMC_DLL_XFORM_QUSE6 */
			0x00000000, /* EMC_DLL_XFORM_QUSE7 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
			0x00030000, /* EMC_DLL_XFORM_DQ0 */
			0x00030000, /* EMC_DLL_XFORM_DQ1 */
			0x00030000, /* EMC_DLL_XFORM_DQ2 */
			0x00030000, /* EMC_DLL_XFORM_DQ3 */
			0x000002a0, /* EMC_XM2CMDPADCTRL */
			0x0800013d, /* EMC_XM2DQSPADCTRL2 */
			0x00000000, /* EMC_XM2DQPADCTRL2 */
			0x77fff884, /* EMC_XM2CLKPADCTRL */
			0x01f1f508, /* EMC_XM2COMPPADCTRL */
			0x05057404, /* EMC_XM2VTTGENPADCTRL */
			0x54000007, /* EMC_XM2VTTGENPADCTRL2 */
			0x080001e8, /* EMC_XM2QUSEPADCTRL */
			0x08000021, /* EMC_XM2DQSPADCTRL3 */
			0x00000802, /* EMC_CTT_TERM_CTRL */
			0x00020000, /* EMC_ZCAL_INTERVAL */
			0x00000100, /* EMC_ZCAL_WAIT_CNT */
			0x0178000c, /* EMC_MRS_WAIT_CNT */
			0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
			0x00000000, /* EMC_CTT */
			0x00000000, /* EMC_CTT_DURATION */
			0x80001bc0, /* EMC_DYN_SELF_REF_CONTROL */
			0x0000000d, /* MC_EMEM_ARB_CFG */
			0xc0000051, /* MC_EMEM_ARB_OUTSTANDING_REQ */
			0x00000002, /* MC_EMEM_ARB_TIMING_RCD */
			0x00000003, /* MC_EMEM_ARB_TIMING_RP */
			0x0000000b, /* MC_EMEM_ARB_TIMING_RC */
			0x00000006, /* MC_EMEM_ARB_TIMING_RAS */
			0x00000006, /* MC_EMEM_ARB_TIMING_FAW */
			0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
			0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
			0x00000009, /* MC_EMEM_ARB_TIMING_WAP2PRE */
			0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
			0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
			0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
			0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
			0x06030202, /* MC_EMEM_ARB_DA_TURNS */
			0x000f080b, /* MC_EMEM_ARB_DA_COVERS */
			0x70a7150c, /* MC_EMEM_ARB_MISC0 */
			0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
			0xe8000000, /* EMC_FBIO_SPARE */
			0xff00ff8b, /* EMC_CFG_RSV */
		},
		0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
		0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
		0x00000000, /* EMC_CFG.PERIODIC_QRST */
		0x80000731, /* Mode Register 0 */
		0x80100002, /* Mode Register 1 */
		0x80200008, /* Mode Register 2 */
		0x00000000, /* EMC_CFG.DYN_SELF_REF */
	},
	{
		0x32,       /* Rev 3.2 */
		533000,     /* SDRAM frequency */
		{
			0x00000018, /* EMC_RC */
			0x00000054, /* EMC_RFC */
			0x00000011, /* EMC_RAS */
			0x00000006, /* EMC_RP */
			0x00000003, /* EMC_R2W */
			0x00000009, /* EMC_W2R */
			0x00000002, /* EMC_R2P */
			0x0000000d, /* EMC_W2P */
			0x00000006, /* EMC_RD_RCD */
			0x00000006, /* EMC_WR_RCD */
			0x00000002, /* EMC_RRD */
			0x00000001, /* EMC_REXT */
			0x00000000, /* EMC_WEXT */
			0x00000005, /* EMC_WDV */
			0x00000008, /* EMC_QUSE */
			0x00000006, /* EMC_QRST */
			0x00000008, /* EMC_QSAFE */
			0x00000010, /* EMC_RDV */
			0x00000ffd, /* EMC_REFRESH */
			0x00000000, /* EMC_BURST_REFRESH_NUM */
			0x000003ff, /* EMC_PRE_REFRESH_REQ_CNT */
			0x0000000b, /* EMC_PDEX2WR */
			0x0000000b, /* EMC_PDEX2RD */
			0x00000001, /* EMC_PCHG2PDEN */
			0x00000000, /* EMC_ACT2PDEN */
			0x0000000a, /* EMC_AR2PDEN */
			0x00000012, /* EMC_RW2PDEN */
			0x0000005b, /* EMC_TXSR */
			0x00000200, /* EMC_TXSRDLL */
			0x0000000d, /* EMC_TCKE */
			0x00000010, /* EMC_TFAW */
			0x00000000, /* EMC_TRPAB */
			0x00000005, /* EMC_TCLKSTABLE */
			0x00000006, /* EMC_TCLKSTOP */
			0x0000103e, /* EMC_TREFBW */
			0x00000000, /* EMC_QUSE_EXTRA */
			0x00000006, /* EMC_FBIO_CFG6 */
			0x00000000, /* EMC_ODT_WRITE */
			0x00000000, /* EMC_ODT_READ */
			0x00007088, /* EMC_FBIO_CFG5 */
			0x00120084, /* EMC_CFG_DIG_DLL */
			0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
			0x00010000, /* EMC_DLL_XFORM_DQS0 */
			0x00010000, /* EMC_DLL_XFORM_DQS1 */
			0x00010000, /* EMC_DLL_XFORM_DQS2 */
			0x00010000, /* EMC_DLL_XFORM_DQS3 */
			0x00010000, /* EMC_DLL_XFORM_DQS4 */
			0x00010000, /* EMC_DLL_XFORM_DQS5 */
			0x00010000, /* EMC_DLL_XFORM_DQS6 */
			0x00010000, /* EMC_DLL_XFORM_DQS7 */
			0x00000000, /* EMC_DLL_XFORM_QUSE0 */
			0x00000000, /* EMC_DLL_XFORM_QUSE1 */
			0x00000000, /* EMC_DLL_XFORM_QUSE2 */
			0x00000000, /* EMC_DLL_XFORM_QUSE3 */
			0x00000000, /* EMC_DLL_XFORM_QUSE4 */
			0x00000000, /* EMC_DLL_XFORM_QUSE5 */
			0x00000000, /* EMC_DLL_XFORM_QUSE6 */
			0x00000000, /* EMC_DLL_XFORM_QUSE7 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
			0x00020000, /* EMC_DLL_XFORM_DQ0 */
			0x00020000, /* EMC_DLL_XFORM_DQ1 */
			0x00020000, /* EMC_DLL_XFORM_DQ2 */
			0x00020000, /* EMC_DLL_XFORM_DQ3 */
			0x000006a0, /* EMC_XM2CMDPADCTRL */
			0x0800013d, /* EMC_XM2DQSPADCTRL2 */
			0x00000000, /* EMC_XM2DQPADCTRL2 */
			0x77ffc084, /* EMC_XM2CLKPADCTRL */
			0x01f1f508, /* EMC_XM2COMPPADCTRL */
			0x05057404, /* EMC_XM2VTTGENPADCTRL */
			0x54000007, /* EMC_XM2VTTGENPADCTRL2 */
			0x08000168, /* EMC_XM2QUSEPADCTRL */
			0x08000021, /* EMC_XM2DQSPADCTRL3 */
			0x00000802, /* EMC_CTT_TERM_CTRL */
			0x00000000, /* EMC_ZCAL_INTERVAL */
			0x00000040, /* EMC_ZCAL_WAIT_CNT */
			0x01ab000c, /* EMC_MRS_WAIT_CNT */
			0xa0f10404, /* EMC_AUTO_CAL_CONFIG */
			0x00000000, /* EMC_CTT */
			0x00000000, /* EMC_CTT_DURATION */
			0x800020ae, /* EMC_DYN_SELF_REF_CONTROL */
			0x0000000f, /* MC_EMEM_ARB_CFG */
			0xc0000060, /* MC_EMEM_ARB_OUTSTANDING_REQ */
			0x00000002, /* MC_EMEM_ARB_TIMING_RCD */
			0x00000003, /* MC_EMEM_ARB_TIMING_RP */
			0x0000000d, /* MC_EMEM_ARB_TIMING_RC */
			0x00000008, /* MC_EMEM_ARB_TIMING_RAS */
			0x00000007, /* MC_EMEM_ARB_TIMING_FAW */
			0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
			0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
			0x00000009, /* MC_EMEM_ARB_TIMING_WAP2PRE */
			0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
			0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
			0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
			0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
			0x06030202, /* MC_EMEM_ARB_DA_TURNS */
			0x0010090d, /* MC_EMEM_ARB_DA_COVERS */
			0x7028180e, /* MC_EMEM_ARB_MISC0 */
			0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
			0x00000000, /* EMC_FBIO_SPARE */
			0xff00ff00, /* EMC_CFG_RSV */
		},
		0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
		0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
		0x00000000, /* EMC_CFG.PERIODIC_QRST */
		0x80000941, /* Mode Register 0 */
		0x80100002, /* Mode Register 1 */
		0x80200008, /* Mode Register 2 */
		0x00000000, /* EMC_CFG.DYN_SELF_REF */
	},
	{
		0x32,       /* Rev 3.2 */
		667000,     /* SDRAM frequency */
		{
			0x0000001f, /* EMC_RC */
			0x00000069, /* EMC_RFC */
			0x00000016, /* EMC_RAS */
			0x00000008, /* EMC_RP */
			0x00000004, /* EMC_R2W */
			0x0000000c, /* EMC_W2R */
			0x00000003, /* EMC_R2P */
			0x00000011, /* EMC_W2P */
			0x00000008, /* EMC_RD_RCD */
			0x00000008, /* EMC_WR_RCD */
			0x00000002, /* EMC_RRD */
			0x00000001, /* EMC_REXT */
			0x00000000, /* EMC_WEXT */
			0x00000007, /* EMC_WDV */
			0x0000000b, /* EMC_QUSE */
			0x00000009, /* EMC_QRST */
			0x0000000c, /* EMC_QSAFE */
			0x00000011, /* EMC_RDV */
			0x00001412, /* EMC_REFRESH */
			0x00000000, /* EMC_BURST_REFRESH_NUM */
			0x00000504, /* EMC_PRE_REFRESH_REQ_CNT */
			0x0000000e, /* EMC_PDEX2WR */
			0x0000000e, /* EMC_PDEX2RD */
			0x00000001, /* EMC_PCHG2PDEN */
			0x00000000, /* EMC_ACT2PDEN */
			0x0000000c, /* EMC_AR2PDEN */
			0x00000016, /* EMC_RW2PDEN */
			0x00000072, /* EMC_TXSR */
			0x00000200, /* EMC_TXSRDLL */
			0x00000010, /* EMC_TCKE */
			0x00000015, /* EMC_TFAW */
			0x00000000, /* EMC_TRPAB */
			0x00000006, /* EMC_TCLKSTABLE */
			0x00000007, /* EMC_TCLKSTOP */
			0x00001453, /* EMC_TREFBW */
			0x0000000c, /* EMC_QUSE_EXTRA */
			0x00000004, /* EMC_FBIO_CFG6 */
			0x00000000, /* EMC_ODT_WRITE */
			0x00000000, /* EMC_ODT_READ */
			0x00005088, /* EMC_FBIO_CFG5 */
			0x40070191, /* EMC_CFG_DIG_DLL */
			0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
			0x00000008, /* EMC_DLL_XFORM_DQS0 */
			0x00000008, /* EMC_DLL_XFORM_DQS1 */
			0x00000008, /* EMC_DLL_XFORM_DQS2 */
			0x00000008, /* EMC_DLL_XFORM_DQS3 */
			0x00000008, /* EMC_DLL_XFORM_DQS4 */
			0x00000008, /* EMC_DLL_XFORM_DQS5 */
			0x00000008, /* EMC_DLL_XFORM_DQS6 */
			0x00000008, /* EMC_DLL_XFORM_DQS7 */
			0x00000000, /* EMC_DLL_XFORM_QUSE0 */
			0x00000000, /* EMC_DLL_XFORM_QUSE1 */
			0x00000000, /* EMC_DLL_XFORM_QUSE2 */
			0x00000000, /* EMC_DLL_XFORM_QUSE3 */
			0x00000000, /* EMC_DLL_XFORM_QUSE4 */
			0x00000000, /* EMC_DLL_XFORM_QUSE5 */
			0x00000000, /* EMC_DLL_XFORM_QUSE6 */
			0x00000000, /* EMC_DLL_XFORM_QUSE7 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
			0x00000008, /* EMC_DLL_XFORM_DQ0 */
			0x00000008, /* EMC_DLL_XFORM_DQ1 */
			0x00000008, /* EMC_DLL_XFORM_DQ2 */
			0x00000008, /* EMC_DLL_XFORM_DQ3 */
			0x000002a0, /* EMC_XM2CMDPADCTRL */
			0x0600013d, /* EMC_XM2DQSPADCTRL2 */
			0x00000000, /* EMC_XM2DQPADCTRL2 */
			0x77fff884, /* EMC_XM2CLKPADCTRL */
			0x01f1f508, /* EMC_XM2COMPPADCTRL */
			0x07077404, /* EMC_XM2VTTGENPADCTRL */
			0x54000000, /* EMC_XM2VTTGENPADCTRL2 */
			0x080001e8, /* EMC_XM2QUSEPADCTRL */
			0x07000021, /* EMC_XM2DQSPADCTRL3 */
			0x00000802, /* EMC_CTT_TERM_CTRL */
			0x00020000, /* EMC_ZCAL_INTERVAL */
			0x00000100, /* EMC_ZCAL_WAIT_CNT */
			0x01d6000c, /* EMC_MRS_WAIT_CNT */
			0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
			0x00000000, /* EMC_CTT */
			0x00000000, /* EMC_CTT_DURATION */
			0x800028a5, /* EMC_DYN_SELF_REF_CONTROL */
			0x00000014, /* MC_EMEM_ARB_CFG */
			0xc0000079, /* MC_EMEM_ARB_OUTSTANDING_REQ */
			0x00000003, /* MC_EMEM_ARB_TIMING_RCD */
			0x00000004, /* MC_EMEM_ARB_TIMING_RP */
			0x00000010, /* MC_EMEM_ARB_TIMING_RC */
			0x0000000a, /* MC_EMEM_ARB_TIMING_RAS */
			0x0000000a, /* MC_EMEM_ARB_TIMING_FAW */
			0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
			0x00000003, /* MC_EMEM_ARB_TIMING_RAP2PRE */
			0x0000000b, /* MC_EMEM_ARB_TIMING_WAP2PRE */
			0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
			0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
			0x00000004, /* MC_EMEM_ARB_TIMING_R2W */
			0x00000008, /* MC_EMEM_ARB_TIMING_W2R */
			0x08040202, /* MC_EMEM_ARB_DA_TURNS */
			0x00140c10, /* MC_EMEM_ARB_DA_COVERS */
			0x734a1f11, /* MC_EMEM_ARB_MISC0 */
			0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
			0xf8000000, /* EMC_FBIO_SPARE */
			0xff00ff01, /* EMC_CFG_RSV */
		},
		0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
		0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
		0x00000001, /* EMC_CFG.PERIODIC_QRST */
		0x80000b71, /* Mode Register 0 */
		0x80100002, /* Mode Register 1 */
		0x80200018, /* Mode Register 2 */
		0x00000000, /* EMC_CFG.DYN_SELF_REF */
	},
	{
		0x32,       /* Rev 3.2 */
		750000,     /* SDRAM frequency */
		{
			0x00000025, /* EMC_RC */
			0x0000007e, /* EMC_RFC */
			0x0000001a, /* EMC_RAS */
			0x00000009, /* EMC_RP */
			0x00000004, /* EMC_R2W */
			0x0000000d, /* EMC_W2R */
			0x00000004, /* EMC_R2P */
			0x00000013, /* EMC_W2P */
			0x00000009, /* EMC_RD_RCD */
			0x00000009, /* EMC_WR_RCD */
			0x00000003, /* EMC_RRD */
			0x00000001, /* EMC_REXT */
			0x00000000, /* EMC_WEXT */
			0x00000007, /* EMC_WDV */
			0x0000000b, /* EMC_QUSE */
			0x00000009, /* EMC_QRST */
			0x0000000c, /* EMC_QSAFE */
			0x00000011, /* EMC_RDV */
			0x0000169a, /* EMC_REFRESH */
			0x00000000, /* EMC_BURST_REFRESH_NUM */
			0x00000608, /* EMC_PRE_REFRESH_REQ_CNT */
			0x00000012, /* EMC_PDEX2WR */
			0x00000012, /* EMC_PDEX2RD */
			0x00000001, /* EMC_PCHG2PDEN */
			0x00000000, /* EMC_ACT2PDEN */
			0x0000000f, /* EMC_AR2PDEN */
			0x00000018, /* EMC_RW2PDEN */
			0x00000088, /* EMC_TXSR */
			0x00000200, /* EMC_TXSRDLL */
			0x00000014, /* EMC_TCKE */
			0x00000018, /* EMC_TFAW */
			0x00000000, /* EMC_TRPAB */
			0x00000007, /* EMC_TCLKSTABLE */
			0x00000008, /* EMC_TCLKSTOP */
			0x00001860, /* EMC_TREFBW */
			0x0000000c, /* EMC_QUSE_EXTRA */
			0x00000004, /* EMC_FBIO_CFG6 */
			0x00000000, /* EMC_ODT_WRITE */
			0x00000000, /* EMC_ODT_READ */
			0x00005088, /* EMC_FBIO_CFG5 */
			0xf0080191, /* EMC_CFG_DIG_DLL */
			0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
			0x00000008, /* EMC_DLL_XFORM_DQS0 */
			0x00000008, /* EMC_DLL_XFORM_DQS1 */
			0x00000008, /* EMC_DLL_XFORM_DQS2 */
			0x00000008, /* EMC_DLL_XFORM_DQS3 */
			0x00000008, /* EMC_DLL_XFORM_DQS4 */
			0x00000008, /* EMC_DLL_XFORM_DQS5 */
			0x00000008, /* EMC_DLL_XFORM_DQS6 */
			0x00000008, /* EMC_DLL_XFORM_DQS7 */
			0x00000000, /* EMC_DLL_XFORM_QUSE0 */
			0x00000000, /* EMC_DLL_XFORM_QUSE1 */
			0x00000000, /* EMC_DLL_XFORM_QUSE2 */
			0x00000000, /* EMC_DLL_XFORM_QUSE3 */
			0x00000000, /* EMC_DLL_XFORM_QUSE4 */
			0x00000000, /* EMC_DLL_XFORM_QUSE5 */
			0x00000000, /* EMC_DLL_XFORM_QUSE6 */
			0x00000000, /* EMC_DLL_XFORM_QUSE7 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
			0x0000000c, /* EMC_DLL_XFORM_DQ0 */
			0x0000000c, /* EMC_DLL_XFORM_DQ1 */
			0x0000000c, /* EMC_DLL_XFORM_DQ2 */
			0x0000000c, /* EMC_DLL_XFORM_DQ3 */
			0x000002a0, /* EMC_XM2CMDPADCTRL */
			0x0600013d, /* EMC_XM2DQSPADCTRL2 */
			0x22220000, /* EMC_XM2DQPADCTRL2 */
			0x77fff884, /* EMC_XM2CLKPADCTRL */
			0x01f1f501, /* EMC_XM2COMPPADCTRL */
			0x07077404, /* EMC_XM2VTTGENPADCTRL */
			0x54000000, /* EMC_XM2VTTGENPADCTRL2 */
			0x080001e8, /* EMC_XM2QUSEPADCTRL */
			0x07000021, /* EMC_XM2DQSPADCTRL3 */
			0x00000802, /* EMC_CTT_TERM_CTRL */
			0x00020000, /* EMC_ZCAL_INTERVAL */
			0x00000100, /* EMC_ZCAL_WAIT_CNT */
			0x0180000c, /* EMC_MRS_WAIT_CNT */
			0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
			0x00000000, /* EMC_CTT */
			0x00000000, /* EMC_CTT_DURATION */
			0x8000308c, /* EMC_DYN_SELF_REF_CONTROL */
			0x00000016, /* MC_EMEM_ARB_CFG */
			0xc0000090, /* MC_EMEM_ARB_OUTSTANDING_REQ */
			0x00000004, /* MC_EMEM_ARB_TIMING_RCD */
			0x00000005, /* MC_EMEM_ARB_TIMING_RP */
			0x00000013, /* MC_EMEM_ARB_TIMING_RC */
			0x0000000c, /* MC_EMEM_ARB_TIMING_RAS */
			0x0000000b, /* MC_EMEM_ARB_TIMING_FAW */
			0x00000002, /* MC_EMEM_ARB_TIMING_RRD */
			0x00000003, /* MC_EMEM_ARB_TIMING_RAP2PRE */
			0x0000000c, /* MC_EMEM_ARB_TIMING_WAP2PRE */
			0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
			0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
			0x00000004, /* MC_EMEM_ARB_TIMING_R2W */
			0x00000008, /* MC_EMEM_ARB_TIMING_W2R */
			0x08040202, /* MC_EMEM_ARB_DA_TURNS */
			0x00160d13, /* MC_EMEM_ARB_DA_COVERS */
			0x72ac2414, /* MC_EMEM_ARB_MISC0 */
			0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
			0xf8000000, /* EMC_FBIO_SPARE */
			0xff00ff49, /* EMC_CFG_RSV */
		},
		0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
		0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
		0x00000001, /* EMC_CFG.PERIODIC_QRST */
		0x80000d71, /* Mode Register 0 */
		0x80100002, /* Mode Register 1 */
		0x80200018, /* Mode Register 2 */
		0x00000000, /* EMC_CFG.DYN_SELF_REF */
	},
	{
		0x32,       /* Rev 3.2 */
		800000,     /* SDRAM frequency */
		{
			0x00000025, /* EMC_RC */
			0x0000007e, /* EMC_RFC */
			0x0000001a, /* EMC_RAS */
			0x00000009, /* EMC_RP */
			0x00000004, /* EMC_R2W */
			0x0000000d, /* EMC_W2R */
			0x00000004, /* EMC_R2P */
			0x00000013, /* EMC_W2P */
			0x00000009, /* EMC_RD_RCD */
			0x00000009, /* EMC_WR_RCD */
			0x00000003, /* EMC_RRD */
			0x00000001, /* EMC_REXT */
			0x00000000, /* EMC_WEXT */
			0x00000007, /* EMC_WDV */
			0x0000000b, /* EMC_QUSE */
			0x00000009, /* EMC_QRST */
			0x0000000c, /* EMC_QSAFE */
			0x00000011, /* EMC_RDV */
			0x00001820, /* EMC_REFRESH */
			0x00000000, /* EMC_BURST_REFRESH_NUM */
			0x00000608, /* EMC_PRE_REFRESH_REQ_CNT */
			0x00000012, /* EMC_PDEX2WR */
			0x00000012, /* EMC_PDEX2RD */
			0x00000001, /* EMC_PCHG2PDEN */
			0x00000000, /* EMC_ACT2PDEN */
			0x0000000f, /* EMC_AR2PDEN */
			0x00000018, /* EMC_RW2PDEN */
			0x00000088, /* EMC_TXSR */
			0x00000200, /* EMC_TXSRDLL */
			0x00000014, /* EMC_TCKE */
			0x00000018, /* EMC_TFAW */
			0x00000000, /* EMC_TRPAB */
			0x00000007, /* EMC_TCLKSTABLE */
			0x00000008, /* EMC_TCLKSTOP */
			0x00001860, /* EMC_TREFBW */
			0x0000000c, /* EMC_QUSE_EXTRA */
			0x00000004, /* EMC_FBIO_CFG6 */
			0x00000000, /* EMC_ODT_WRITE */
			0x00000000, /* EMC_ODT_READ */
			0x00005088, /* EMC_FBIO_CFG5 */
			0xf0070191, /* EMC_CFG_DIG_DLL */
			0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
			0x0000800a, /* EMC_DLL_XFORM_DQS0 */
			0x0000000a, /* EMC_DLL_XFORM_DQS1 */
			0x0000000a, /* EMC_DLL_XFORM_DQS2 */
			0x0000000a, /* EMC_DLL_XFORM_DQS3 */
			0x0000000a, /* EMC_DLL_XFORM_DQS4 */
			0x0000000a, /* EMC_DLL_XFORM_DQS5 */
			0x0000000a, /* EMC_DLL_XFORM_DQS6 */
			0x0000000a, /* EMC_DLL_XFORM_DQS7 */
			0x00000000, /* EMC_DLL_XFORM_QUSE0 */
			0x00000000, /* EMC_DLL_XFORM_QUSE1 */
			0x00000000, /* EMC_DLL_XFORM_QUSE2 */
			0x00000000, /* EMC_DLL_XFORM_QUSE3 */
			0x00000000, /* EMC_DLL_XFORM_QUSE4 */
			0x00000000, /* EMC_DLL_XFORM_QUSE5 */
			0x00000000, /* EMC_DLL_XFORM_QUSE6 */
			0x00000000, /* EMC_DLL_XFORM_QUSE7 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
			0x007fc00a, /* EMC_DLL_XFORM_DQ0 */
			0x0000000a, /* EMC_DLL_XFORM_DQ1 */
			0x0000000a, /* EMC_DLL_XFORM_DQ2 */
			0x0000000a, /* EMC_DLL_XFORM_DQ3 */
			0x000002a0, /* EMC_XM2CMDPADCTRL */
			0x0600013d, /* EMC_XM2DQSPADCTRL2 */
			0x22220000, /* EMC_XM2DQPADCTRL2 */
			0x77fff884, /* EMC_XM2CLKPADCTRL */
			0x01f1f501, /* EMC_XM2COMPPADCTRL */
			0x07077404, /* EMC_XM2VTTGENPADCTRL */
			0x54000000, /* EMC_XM2VTTGENPADCTRL2 */
			0x080001e8, /* EMC_XM2QUSEPADCTRL */
			0x07000021, /* EMC_XM2DQSPADCTRL3 */
			0x00000802, /* EMC_CTT_TERM_CTRL */
			0x00020000, /* EMC_ZCAL_INTERVAL */
			0x00000100, /* EMC_ZCAL_WAIT_CNT */
			0x0180000c, /* EMC_MRS_WAIT_CNT */
			0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
			0x00000000, /* EMC_CTT */
			0x00000000, /* EMC_CTT_DURATION */
			0x8000308c, /* EMC_DYN_SELF_REF_CONTROL */
			0x00000018, /* MC_EMEM_ARB_CFG */
			0xc0000090, /* MC_EMEM_ARB_OUTSTANDING_REQ */
			0x00000004, /* MC_EMEM_ARB_TIMING_RCD */
			0x00000005, /* MC_EMEM_ARB_TIMING_RP */
			0x00000013, /* MC_EMEM_ARB_TIMING_RC */
			0x0000000c, /* MC_EMEM_ARB_TIMING_RAS */
			0x0000000b, /* MC_EMEM_ARB_TIMING_FAW */
			0x00000002, /* MC_EMEM_ARB_TIMING_RRD */
			0x00000003, /* MC_EMEM_ARB_TIMING_RAP2PRE */
			0x0000000c, /* MC_EMEM_ARB_TIMING_WAP2PRE */
			0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
			0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
			0x00000004, /* MC_EMEM_ARB_TIMING_R2W */
			0x00000008, /* MC_EMEM_ARB_TIMING_W2R */
			0x08040202, /* MC_EMEM_ARB_DA_TURNS */
			0x00160d13, /* MC_EMEM_ARB_DA_COVERS */
			0x72ac2414, /* MC_EMEM_ARB_MISC0 */
			0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
			0xf8000000, /* EMC_FBIO_SPARE */
			0xff00ff49, /* EMC_CFG_RSV */
		},
		0x00000040, /* EMC_ZCAL_WAIT_CNT after clock change */
		0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
		0x00000001, /* EMC_CFG.PERIODIC_QRST */
		0x80000d71, /* Mode Register 0 */
		0x80100002, /* Mode Register 1 */
		0x80200018, /* Mode Register 2 */
		0x00000000, /* EMC_CFG.DYN_SELF_REF */
	},
	{
		0x32,       /* Rev 3.2 */
		900000,     /* SDRAM frequency */
		{
			0x0000002a, /* EMC_RC */
			0x0000008e, /* EMC_RFC */
			0x0000001e, /* EMC_RAS */
			0x0000000b, /* EMC_RP */
			0x00000006, /* EMC_R2W */
			0x0000000f, /* EMC_W2R */
			0x00000005, /* EMC_R2P */
			0x00000016, /* EMC_W2P */
			0x0000000b, /* EMC_RD_RCD */
			0x0000000b, /* EMC_WR_RCD */
			0x00000004, /* EMC_RRD */
			0x00000001, /* EMC_REXT */
			0x00000000, /* EMC_WEXT */
			0x00000008, /* EMC_WDV */
			0x0000000d, /* EMC_QUSE */
			0x0000000b, /* EMC_QRST */
			0x0000000b, /* EMC_QSAFE */
			0x00000014, /* EMC_RDV */
			0x00001b2c, /* EMC_REFRESH */
			0x00000000, /* EMC_BURST_REFRESH_NUM */
			0x000006cb, /* EMC_PRE_REFRESH_REQ_CNT */
			0x00000004, /* EMC_PDEX2WR */
			0x00000014, /* EMC_PDEX2RD */
			0x00000001, /* EMC_PCHG2PDEN */
			0x00000000, /* EMC_ACT2PDEN */
			0x00000011, /* EMC_AR2PDEN */
			0x0000001b, /* EMC_RW2PDEN */
			0x00000099, /* EMC_TXSR */
			0x00000200, /* EMC_TXSRDLL */
			0x00000006, /* EMC_TCKE */
			0x0000001b, /* EMC_TFAW */
			0x00000000, /* EMC_TRPAB */
			0x00000008, /* EMC_TCLKSTABLE */
			0x00000009, /* EMC_TCLKSTOP */
			0x00001b6c, /* EMC_TREFBW */
			0x0000000e, /* EMC_QUSE_EXTRA */
			0x00000004, /* EMC_FBIO_CFG6 */
			0x00000000, /* EMC_ODT_WRITE */
			0x00000000, /* EMC_ODT_READ */
			0x00005088, /* EMC_FBIO_CFG5 */
			0xf0040191, /* EMC_CFG_DIG_DLL */
			0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
			0x0000800a, /* EMC_DLL_XFORM_DQS0 */
			0x0000000a, /* EMC_DLL_XFORM_DQS1 */
			0x007fc00a, /* EMC_DLL_XFORM_DQS2 */
			0x0000000a, /* EMC_DLL_XFORM_DQS3 */
			0x0000000a, /* EMC_DLL_XFORM_DQS4 */
			0x0000000a, /* EMC_DLL_XFORM_DQS5 */
			0x0000000a, /* EMC_DLL_XFORM_DQS6 */
			0x0000000a, /* EMC_DLL_XFORM_DQS7 */
			0x0001c000, /* EMC_DLL_XFORM_QUSE0 */
			0x0001c000, /* EMC_DLL_XFORM_QUSE1 */
			0x0001c000, /* EMC_DLL_XFORM_QUSE2 */
			0x0001c000, /* EMC_DLL_XFORM_QUSE3 */
			0x0001c000, /* EMC_DLL_XFORM_QUSE4 */
			0x0001c000, /* EMC_DLL_XFORM_QUSE5 */
			0x0001c000, /* EMC_DLL_XFORM_QUSE6 */
			0x0001c000, /* EMC_DLL_XFORM_QUSE7 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
			0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
			0x007fc00a, /* EMC_DLL_XFORM_DQ0 */
			0x0000000a, /* EMC_DLL_XFORM_DQ1 */
			0x0000000a, /* EMC_DLL_XFORM_DQ2 */
			0x0000000a, /* EMC_DLL_XFORM_DQ3 */
			0x000002a0, /* EMC_XM2CMDPADCTRL */
			0x0600013d, /* EMC_XM2DQSPADCTRL2 */
			0x22220000, /* EMC_XM2DQPADCTRL2 */
			0x77fff884, /* EMC_XM2CLKPADCTRL */
			0x01f1f501, /* EMC_XM2COMPPADCTRL */
			0x07077404, /* EMC_XM2VTTGENPADCTRL */
			0x54000000, /* EMC_XM2VTTGENPADCTRL2 */
			0x080001e8, /* EMC_XM2QUSEPADCTRL */
			0x07000021, /* EMC_XM2DQSPADCTRL3 */
			0x00000802, /* EMC_CTT_TERM_CTRL */
			0x00020000, /* EMC_ZCAL_INTERVAL */
			0x00000120, /* EMC_ZCAL_WAIT_CNT */
			0x0128000c, /* EMC_MRS_WAIT_CNT */
			0xa0f10000, /* EMC_AUTO_CAL_CONFIG */
			0x00000000, /* EMC_CTT */
			0x00000000, /* EMC_CTT_DURATION */
			0x8000367d, /* EMC_DYN_SELF_REF_CONTROL */
			0x0000001b, /* MC_EMEM_ARB_CFG */
			0xc00000a2, /* MC_EMEM_ARB_OUTSTANDING_REQ */
			0x00000005, /* MC_EMEM_ARB_TIMING_RCD */
			0x00000006, /* MC_EMEM_ARB_TIMING_RP */
			0x00000016, /* MC_EMEM_ARB_TIMING_RC */
			0x0000000e, /* MC_EMEM_ARB_TIMING_RAS */
			0x0000000d, /* MC_EMEM_ARB_TIMING_FAW */
			0x00000002, /* MC_EMEM_ARB_TIMING_RRD */
			0x00000004, /* MC_EMEM_ARB_TIMING_RAP2PRE */
			0x0000000e, /* MC_EMEM_ARB_TIMING_WAP2PRE */
			0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
			0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
			0x00000005, /* MC_EMEM_ARB_TIMING_R2W */
			0x00000009, /* MC_EMEM_ARB_TIMING_W2R */
			0x09050202, /* MC_EMEM_ARB_DA_TURNS */
			0x001a1016, /* MC_EMEM_ARB_DA_COVERS */
			0x714e2917, /* MC_EMEM_ARB_MISC0 */
			0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
			0xe8000000, /* EMC_FBIO_SPARE */
			0xff00ff4b, /* EMC_CFG_RSV */
		},
		0x00000048, /* EMC_ZCAL_WAIT_CNT after clock change */
		0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
		0x00000001, /* EMC_CFG.PERIODIC_QRST */
		0x80000f15, /* Mode Register 0 */
		0x80100002, /* Mode Register 1 */
		0x80200020, /* Mode Register 2 */
		0x00000000, /* EMC_CFG.DYN_SELF_REF */
	},
};
#endif

static const struct tegra_emc_table apalis_t30_emc_tables_mt41k256m16re_15e[] = {
//25.5, 51, 102
	{
		0x32,       /* Rev 3.2 */
//204 MHz crashes
		200000,     /* SDRAM frequency [kHz] */
		{
			0x0000000a,  /* EmcRc */
			0x00000033,  /* EmcRfc */
			0x00000007,  /* EmcRas */
			0x00000002,  /* EmcRp */
			0x00000003,  /* EmcR2w */
			0x00000009,  /* EmcW2r */
			0x00000005,  /* EmcR2p */
			0x0000000a,  /* EmcW2p */
			0x00000002,  /* EmcRdRcd */
			0x00000002,  /* EmcWrRcd */
			0x00000003,  /* EmcRrd */
			0x00000001,  /* EmcRext */
			0x00000000,  /* EmcWext */
			0x00000004,  /* EmcWdv */
			0x00000005,  /* EmcQUse */
			0x00000004,  /* EmcQRst */
			0x00000009,  /* EmcQSafe */
			0x0000000b,  /* EmcRdv */
			0x000005e9,  /* EmcRefresh */
			0x00000000,  /* EmcBurstRefreshNum */
			0x0000017a,  /* EmcPreRefreshReqCnt */
			0x00000002,  /* EmcPdEx2Wr */
			0x00000002,  /* EmcPdEx2Rd */
			0x00000001,  /* EmcPChg2Pden */
			0x00000000,  /* EmcAct2Pden */
			0x00000007,  /* EmcAr2Pden */
			0x0000000e,  /* EmcRw2Pden */
			0x00000036,  /* EmcTxsr */
			0x00000134,  /* EmcTxsrDll */
			0x00000004,  /* EmcTcke */
			0x0000000a,  /* EmcTfaw */
			0x00000000,  /* EmcTrpab */
			0x00000004,  /* EmcTClkStable */
			0x00000005,  /* EmcTClkStop */
			0x00000618,  /* EmcTRefBw */
			0x00000006,  /* EmcQUseExtra */
			0x00000004,  /* EmcFbioCfg6 */
			0x00000000,  /* EmcOdtWrite */
			0x00000000,  /* EmcOdtRead */
			0x00004288,  /* EmcFbioCfg5 */
			0x004600a4,  /* EmcCfgDigDll */
			0x00008000,  /* EmcCfgDigDllPeriod */
			0x00080000,  /* EmcDllXformDqs0 */
			0x00080000,  /* EmcDllXformDqs1 */
			0x00080000,  /* EmcDllXformDqs2 */
			0x00080000,  /* EmcDllXformDqs3 */
			0x00080000,  /* EmcDllXformDqs4 */
			0x00080000,  /* EmcDllXformDqs5 */
			0x00080000,  /* EmcDllXformDqs6 */
			0x00080000,  /* EmcDllXformDqs7 */
			0x00000000,  /* EmcDllXformQUse0 */
			0x00000000,  /* EmcDllXformQUse1 */
			0x00000000,  /* EmcDllXformQUse2 */
			0x00000000,  /* EmcDllXformQUse3 */
			0x00000000,  /* EmcDllXformQUse4 */
			0x00000000,  /* EmcDllXformQUse5 */
			0x00000000,  /* EmcDllXformQUse6 */
			0x00000000,  /* EmcDllXformQUse7 */
			0x00000000,  /* EmcDliTrimTxDqs0 */
			0x00000000,  /* EmcDliTrimTxDqs1 */
			0x00000000,  /* EmcDliTrimTxDqs2 */
			0x00000000,  /* EmcDliTrimTxDqs3 */
			0x00000000,  /* EmcDliTrimTxDqs4 */
			0x00000000,  /* EmcDliTrimTxDqs5 */
			0x00000000,  /* EmcDliTrimTxDqs6 */
			0x00000000,  /* EmcDliTrimTxDqs7 */
			0x00080000,  /* EmcDllXformDq0 */
			0x00080000,  /* EmcDllXformDq1 */
			0x00080000,  /* EmcDllXformDq2 */
			0x00080000,  /* EmcDllXformDq3 */
			0x000002a0,  /* EmcXm2CmdPadCtrl */
			0x0800211c,  /* EmcXm2DqsPadCtrl2 */
			0x00000000,  /* EmcXm2DqPadCtrl2 */
			0x77fff884,  /* EmcXm2ClkPadCtrl */
			0x01f1f108,  /* EmcXm2CompPadCtrl */
			0x05057404,  /* EmcXm2VttGenPadCtrl */
			0x54000007,  /* EmcXm2VttGenPadCtrl2 */
			0x08000168,  /* EmcXm2QUsePadCtrl */
			0x08000000,  /* EmcXm2DqsPadCtrl3 */
			0x00000802,  /* EmcCttTermCtrl */
			0x00020000,  /* EmcZcalInterval */
			0x00000040,  /* EmcZcalWaitCnt */
			0x000c000c,  /* EmcMrsWaitCnt */
			0x001fffff,  /* EmcAutoCalInterval */
			0x00000000,  /* EmcCtt */
			0x00000000,  /* EmcCttDuration */
			0x80000ce6,  /* EmcDynSelfRefControl */
			0x00000003,  /* McEmemArbCfg */
			0xc0000024,  /* McEmemArbOutstandingReq */
			0x00000001,  /* McEmemArbTimingRcd */
			0x00000001,  /* McEmemArbTimingRp */
			0x00000005,  /* McEmemArbTimingRc */
			0x00000002,  /* McEmemArbTimingRas */
			0x00000004,  /* McEmemArbTimingFaw */
			0x00000001,  /* McEmemArbTimingRrd */
			0x00000003,  /* McEmemArbTimingRap2Pre */
			0x00000007,  /* McEmemArbTimingWap2Pre */
			0x00000002,  /* McEmemArbTimingR2R */
			0x00000001,  /* McEmemArbTimingW2W */
			0x00000003,  /* McEmemArbTimingR2W */
			0x00000006,  /* McEmemArbTimingW2R */
			0x06030102,  /* McEmemArbDaTurns */
			0x00090505,  /* McEmemArbDaCovers */
			0x76a30906,  /* McEmemArbMisc0 */
			0x001f0000,  /* McEmemArbRing1Throttle */
			0xe8000000,  /* EmcFbioSpare */
			0xff00ff00,  /* EmcCfgRsv */
		},
		0x00000040,  /* EmcZcalWaitCnt */
		0x00020000,  /* EmcZcalInterval */
		0x00000001,  /* EmcCfg bit 27PERIODIC_QRST */
		0x80001221,  /* EmcMrs */
		0x80100003,  /* EmcEmrs */
		0x00000000,  /* EmcMrw1 */
		0x00000001,  /* EmcCfg bit 28 DYN_SELF_REF */
	},
	{
		0x32,       /* Rev 3.2 */
		300000,     /* SDRAM frequency [kHz] */
		{
			0x00000010,  /* EmcRc */
			0x0000004d,  /* EmcRfc */
			0x0000000b,  /* EmcRas */
			0x00000003,  /* EmcRp */
			0x00000002,  /* EmcR2w */
			0x00000008,  /* EmcW2r */
			0x00000003,  /* EmcR2p */
			0x00000009,  /* EmcW2p */
			0x00000003,  /* EmcRdRcd */
			0x00000002,  /* EmcWrRcd */
			0x00000002,  /* EmcRrd */
			0x00000001,  /* EmcRext */
			0x00000000,  /* EmcWext */
			0x00000004,  /* EmcWdv */
			0x00000006,  /* EmcQUse */
			0x00000004,  /* EmcQRst */
			0x0000000a,  /* EmcQSafe */
			0x0000000c,  /* EmcRdv */
			0x000008e6,  /* EmcRefresh */
			0x00000000,  /* EmcBurstRefreshNum */
			0x00000240,  /* EmcPreRefreshReqCnt */
			0x0000000a,  /* EmcPdEx2Wr */
			0x00000008,  /* EmcPdEx2Rd */
			0x00000007,  /* EmcPChg2Pden */
			0x00000000,  /* EmcAct2Pden */
			0x00000007,  /* EmcAr2Pden */
			0x0000000e,  /* EmcRw2Pden */
			0x000000b4,  /* EmcTxsr */
			0x00000200,  /* EmcTxsrDll */
			0x00000004,  /* EmcTcke */
			0x00000010,  /* EmcTfaw */
			0x00000000,  /* EmcTrpab */
			0x00000004,  /* EmcTClkStable */
			0x00000005,  /* EmcTClkStop */
			0x00000927,  /* EmcTRefBw */
			0x00000007,  /* EmcQUseExtra */
			0x00000004,  /* EmcFbioCfg6 */
			0x00000000,  /* EmcOdtWrite */
			0x00000000,  /* EmcOdtRead */
			0x00005288,  /* EmcFbioCfg5 */
			0x002b00a4,  /* EmcCfgDigDll */
			0x00008000,  /* EmcCfgDigDllPeriod */
			0x00014000,  /* EmcDllXformDqs0 */
			0x00014000,  /* EmcDllXformDqs1 */
			0x00014000,  /* EmcDllXformDqs2 */
			0x00014000,  /* EmcDllXformDqs3 */
			0x00014000,  /* EmcDllXformDqs4 */
			0x00014000,  /* EmcDllXformDqs5 */
			0x00014000,  /* EmcDllXformDqs6 */
			0x00014000,  /* EmcDllXformDqs7 */
			0x00000000,  /* EmcDllXformQUse0 */
			0x00000000,  /* EmcDllXformQUse1 */
			0x00000000,  /* EmcDllXformQUse2 */
			0x00000000,  /* EmcDllXformQUse3 */
			0x00000000,  /* EmcDllXformQUse4 */
			0x00000000,  /* EmcDllXformQUse5 */
			0x00000000,  /* EmcDllXformQUse6 */
			0x00000000,  /* EmcDllXformQUse7 */
			0x00000000,  /* EmcDliTrimTxDqs0 */
			0x00000000,  /* EmcDliTrimTxDqs1 */
			0x00000000,  /* EmcDliTrimTxDqs2 */
			0x00000000,  /* EmcDliTrimTxDqs3 */
			0x00000000,  /* EmcDliTrimTxDqs4 */
			0x00000000,  /* EmcDliTrimTxDqs5 */
			0x00000000,  /* EmcDliTrimTxDqs6 */
			0x00000000,  /* EmcDliTrimTxDqs7 */
			0x00020000,  /* EmcDllXformDq0 */
			0x00020000,  /* EmcDllXformDq1 */
			0x00020000,  /* EmcDllXformDq2 */
			0x00020000,  /* EmcDllXformDq3 */
			0x000002a0,  /* EmcXm2CmdPadCtrl */
			0x0800211c,  /* EmcXm2DqsPadCtrl2 */
			0x00000000,  /* EmcXm2DqPadCtrl2 */
			0x77fff884,  /* EmcXm2ClkPadCtrl */
			0x01f1f508,  /* EmcXm2CompPadCtrl */
			0x05057404,  /* EmcXm2VttGenPadCtrl */
			0x54000007,  /* EmcXm2VttGenPadCtrl2 */
			0x08000168,  /* EmcXm2QUsePadCtrl */
			0x08000000,  /* EmcXm2DqsPadCtrl3 */
			0x00000802,  /* EmcCttTermCtrl */
			0x00020000,  /* EmcZcalInterval */
			0x00000040,  /* EmcZcalWaitCnt */
			0x0172000c,  /* EmcMrsWaitCnt */
			0x001fffff,  /* EmcAutoCalInterval */
			0x00000000,  /* EmcCtt */
			0x00000000,  /* EmcCttDuration */
			0x800012db,  /* EmcDynSelfRefControl */
			0x00000004,  /* McEmemArbCfg */
			0x80000037,  /* McEmemArbOutstandingReq */
			0x00000001,  /* McEmemArbTimingRcd */
			0x00000001,  /* McEmemArbTimingRp */
			0x00000007,  /* McEmemArbTimingRc */
			0x00000004,  /* McEmemArbTimingRas */
			0x00000007,  /* McEmemArbTimingFaw */
			0x00000001,  /* McEmemArbTimingRrd */
			0x00000002,  /* McEmemArbTimingRap2Pre */
			0x00000007,  /* McEmemArbTimingWap2Pre */
			0x00000002,  /* McEmemArbTimingR2R */
			0x00000002,  /* McEmemArbTimingW2W */
			0x00000005,  /* McEmemArbTimingR2W */
			0x00000006,  /* McEmemArbTimingW2R */
			0x06030202,  /* McEmemArbDaTurns */
			0x000a0507,  /* McEmemArbDaCovers */
			0x70850e08,  /* McEmemArbMisc0 */
			0x001f0000,  /* McEmemArbRing1Throttle */
			0xe8000000,  /* EmcFbioSpare */
			0xff00ff88,  /* EmcCfgRsv */
		},
		0x00000040,  /* EmcZcalWaitCnt */
		0x00020000,  /* EmcZcalInterval */
		0x00000001,  /* EmcCfg bit 27PERIODIC_QRST */
		0x80000321,  /* EmcMrs */
		0x80100002,  /* EmcEmrs */
		0x00000000,  /* EmcMrw1 */
		0x00000000,  /* EmcCfg bit 28 DYN_SELF_REF */
	},
	{
		0x32,       /* Rev 3.2 */
		333000,     /* SDRAM frequency [kHz] */
		{
			0x00000010,  /* EmcRc */
			0x00000055,  /* EmcRfc */
			0x0000000c,  /* EmcRas */
			0x00000004,  /* EmcRp */
			0x00000006,  /* EmcR2w */
			0x00000008,  /* EmcW2r */
			0x00000003,  /* EmcR2p */
			0x00000009,  /* EmcW2p */
			0x00000004,  /* EmcRdRcd */
			0x00000003,  /* EmcWrRcd */
			0x00000002,  /* EmcRrd */
			0x00000001,  /* EmcRext */
			0x00000000,  /* EmcWext */
			0x00000004,  /* EmcWdv */
			0x00000006,  /* EmcQUse */
			0x00000004,  /* EmcQRst */
			0x0000000a,  /* EmcQSafe */
			0x0000000c,  /* EmcRdv */
			0x000009e8,  /* EmcRefresh */
			0x00000000,  /* EmcBurstRefreshNum */
			0x0000027e,  /* EmcPreRefreshReqCnt */
			0x0000000a,  /* EmcPdEx2Wr */
			0x00000008,  /* EmcPdEx2Rd */
			0x00000007,  /* EmcPChg2Pden */
			0x00000000,  /* EmcAct2Pden */
			0x00000007,  /* EmcAr2Pden */
			0x0000000e,  /* EmcRw2Pden */
			0x000000b4,  /* EmcTxsr */
			0x00000200,  /* EmcTxsrDll */
			0x00000004,  /* EmcTcke */
			0x00000015,  /* EmcTfaw */
			0x00000000,  /* EmcTrpab */
			0x00000004,  /* EmcTClkStable */
			0x00000005,  /* EmcTClkStop */
			0x00000a28,  /* EmcTRefBw */
			0x00000000,  /* EmcQUseExtra */
			0x00000006,  /* EmcFbioCfg6 */
			0x00000000,  /* EmcOdtWrite */
			0x00000000,  /* EmcOdtRead */
			0x00007088,  /* EmcFbioCfg5 */
			0x002600a4,  /* EmcCfgDigDll */
			0x00008000,  /* EmcCfgDigDllPeriod */
			0x00014000,  /* EmcDllXformDqs0 */
			0x00014000,  /* EmcDllXformDqs1 */
			0x00014000,  /* EmcDllXformDqs2 */
			0x00014000,  /* EmcDllXformDqs3 */
			0x00014000,  /* EmcDllXformDqs4 */
			0x00014000,  /* EmcDllXformDqs5 */
			0x00014000,  /* EmcDllXformDqs6 */
			0x00014000,  /* EmcDllXformDqs7 */
			0x00000000,  /* EmcDllXformQUse0 */
			0x00000000,  /* EmcDllXformQUse1 */
			0x00000000,  /* EmcDllXformQUse2 */
			0x00000000,  /* EmcDllXformQUse3 */
			0x00000000,  /* EmcDllXformQUse4 */
			0x00000000,  /* EmcDllXformQUse5 */
			0x00000000,  /* EmcDllXformQUse6 */
			0x00000000,  /* EmcDllXformQUse7 */
			0x00000000,  /* EmcDliTrimTxDqs0 */
			0x00000000,  /* EmcDliTrimTxDqs1 */
			0x00000000,  /* EmcDliTrimTxDqs2 */
			0x00000000,  /* EmcDliTrimTxDqs3 */
			0x00000000,  /* EmcDliTrimTxDqs4 */
			0x00000000,  /* EmcDliTrimTxDqs5 */
			0x00000000,  /* EmcDliTrimTxDqs6 */
			0x00000000,  /* EmcDliTrimTxDqs7 */
			0x00020000,  /* EmcDllXformDq0 */
			0x00020000,  /* EmcDllXformDq1 */
			0x00020000,  /* EmcDllXformDq2 */
			0x00020000,  /* EmcDllXformDq3 */
			0x000002a0,  /* EmcXm2CmdPadCtrl */
			0x0800013d,  /* EmcXm2DqsPadCtrl2 */
			0x00000000,  /* EmcXm2DqPadCtrl2 */
			0x77fff884,  /* EmcXm2ClkPadCtrl */
			0x01f1f508,  /* EmcXm2CompPadCtrl */
			0x05057404,  /* EmcXm2VttGenPadCtrl */
			0x54000007,  /* EmcXm2VttGenPadCtrl2 */
			0x080001e8,  /* EmcXm2QUsePadCtrl */
			0x08000021,  /* EmcXm2DqsPadCtrl3 */
			0x00000802,  /* EmcCttTermCtrl */
			0x00020000,  /* EmcZcalInterval */
			0x00000040,  /* EmcZcalWaitCnt */
			0x016a000c,  /* EmcMrsWaitCnt */
			0x001fffff,  /* EmcAutoCalInterval */
			0x00000000,  /* EmcCtt */
			0x00000000,  /* EmcCttDuration */
			0x800014d2,  /* EmcDynSelfRefControl */
			0x00000005,  /* McEmemArbCfg */
			0x8000003c,  /* McEmemArbOutstandingReq */
			0x00000001,  /* McEmemArbTimingRcd */
			0x00000002,  /* McEmemArbTimingRp */
			0x00000008,  /* McEmemArbTimingRc */
			0x00000005,  /* McEmemArbTimingRas */
			0x0000000a,  /* McEmemArbTimingFaw */
			0x00000001,  /* McEmemArbTimingRrd */
			0x00000002,  /* McEmemArbTimingRap2Pre */
			0x00000007,  /* McEmemArbTimingWap2Pre */
			0x00000002,  /* McEmemArbTimingR2R */
			0x00000002,  /* McEmemArbTimingW2W */
			0x00000005,  /* McEmemArbTimingR2W */
			0x00000006,  /* McEmemArbTimingW2R */
			0x06030202,  /* McEmemArbDaTurns */
			0x000b0608,  /* McEmemArbDaCovers */
			0x70850f09,  /* McEmemArbMisc0 */
			0x001f0000,  /* McEmemArbRing1Throttle */
			0xe8000000,  /* EmcFbioSpare */
			0xff00ff88,  /* EmcCfgRsv */
		},
		0x00000040,  /* EmcZcalWaitCnt */
		0x00020000,  /* EmcZcalInterval */
		0x00000000,  /* EmcCfg bit 27PERIODIC_QRST */
		0x80000321,  /* EmcMrs */
		0x80100002,  /* EmcEmrs */
		0x00000000,  /* EmcMrw1 */
		0x00000000,  /* EmcCfg bit 28 DYN_SELF_REF */
	},
//400
	{
		0x32,       /* Rev 3.2 */
		533000,     /* SDRAM frequency [kHz] */
		{
			0x0000001a,  /* EmcRc */
			0x0000008b,  /* EmcRfc */
			0x00000013,  /* EmcRas */
			0x00000006,  /* EmcRp */
			0x00000006,  /* EmcR2w */
			0x0000000b,  /* EmcW2r */
			0x00000003,  /* EmcR2p */
			0x0000000e,  /* EmcW2p */
			0x00000006,  /* EmcRdRcd */
			0x00000006,  /* EmcWrRcd */
			0x00000003,  /* EmcRrd */
			0x00000001,  /* EmcRext */
			0x00000000,  /* EmcWext */
			0x00000006,  /* EmcWdv */
			0x00000009,  /* EmcQUse */
			0x00000007,  /* EmcQRst */
			0x0000000a,  /* EmcQSafe */
			0x0000000f,  /* EmcRdv */
			0x0000100b,  /* EmcRefresh */
			0x00000000,  /* EmcBurstRefreshNum */
			0x000003ff,  /* EmcPreRefreshReqCnt */
			0x0000000c,  /* EmcPdEx2Wr */
			0x0000000c,  /* EmcPdEx2Rd */
			0x00000007,  /* EmcPChg2Pden */
			0x00000000,  /* EmcAct2Pden */
			0x0000000a,  /* EmcAr2Pden */
			0x00000012,  /* EmcRw2Pden */
			0x000000b4,  /* EmcTxsr */
			0x00000200,  /* EmcTxsrDll */
			0x00000004,  /* EmcTcke */
			0x0000001e,  /* EmcTfaw */
			0x00000000,  /* EmcTrpab */
			0x00000005,  /* EmcTClkStable */
			0x00000006,  /* EmcTClkStop */
			0x0000103e,  /* EmcTRefBw */
			0x00000000,  /* EmcQUseExtra */
			0x00000006,  /* EmcFbioCfg6 */
			0x00000000,  /* EmcOdtWrite */
			0x00000000,  /* EmcOdtRead */
			0x00007088,  /* EmcFbioCfg5 */
			0xf0120091,  /* EmcCfgDigDll */
			0x00008000,  /* EmcCfgDigDllPeriod */
			0x0000000a,  /* EmcDllXformDqs0 */
			0x0000000a,  /* EmcDllXformDqs1 */
			0x0000000a,  /* EmcDllXformDqs2 */
			0x0000000a,  /* EmcDllXformDqs3 */
			0x0000000a,  /* EmcDllXformDqs4 */
			0x0000000a,  /* EmcDllXformDqs5 */
			0x0000000a,  /* EmcDllXformDqs6 */
			0x0000000a,  /* EmcDllXformDqs7 */
			0x00000000,  /* EmcDllXformQUse0 */
			0x00000000,  /* EmcDllXformQUse1 */
			0x00000000,  /* EmcDllXformQUse2 */
			0x00000000,  /* EmcDllXformQUse3 */
			0x00000000,  /* EmcDllXformQUse4 */
			0x00000000,  /* EmcDllXformQUse5 */
			0x00000000,  /* EmcDllXformQUse6 */
			0x00000000,  /* EmcDllXformQUse7 */
			0x00000000,  /* EmcDliTrimTxDqs0 */
			0x00000000,  /* EmcDliTrimTxDqs1 */
			0x00000000,  /* EmcDliTrimTxDqs2 */
			0x00000000,  /* EmcDliTrimTxDqs3 */
			0x00000000,  /* EmcDliTrimTxDqs4 */
			0x00000000,  /* EmcDliTrimTxDqs5 */
			0x00000000,  /* EmcDliTrimTxDqs6 */
			0x00000000,  /* EmcDliTrimTxDqs7 */
			0x0000000a,  /* EmcDllXformDq0 */
			0x0000000a,  /* EmcDllXformDq1 */
			0x0000000a,  /* EmcDllXformDq2 */
			0x0000000a,  /* EmcDllXformDq3 */
			0x000002a0,  /* EmcXm2CmdPadCtrl */
			0x0800013d,  /* EmcXm2DqsPadCtrl2 */
			0x00000000,  /* EmcXm2DqPadCtrl2 */
			0x77fff884,  /* EmcXm2ClkPadCtrl */
			0x01f1f508,  /* EmcXm2CompPadCtrl */
			0x05057404,  /* EmcXm2VttGenPadCtrl */
			0x54000007,  /* EmcXm2VttGenPadCtrl2 */
			0x080001e8,  /* EmcXm2QUsePadCtrl */
			0x08000021,  /* EmcXm2DqsPadCtrl3 */
			0x00000802,  /* EmcCttTermCtrl */
			0x00020000,  /* EmcZcalInterval */
			0x00000040,  /* EmcZcalWaitCnt */
			0x016b000c,  /* EmcMrsWaitCnt */
			0x001fffff,  /* EmcAutoCalInterval */
			0x00000000,  /* EmcCtt */
			0x00000000,  /* EmcCttDuration */
			0x800020ae,  /* EmcDynSelfRefControl */
			0x00000008,  /* McEmemArbCfg */
			0x80000060,  /* McEmemArbOutstandingReq */
			0x00000002,  /* McEmemArbTimingRcd */
			0x00000003,  /* McEmemArbTimingRp */
			0x0000000d,  /* McEmemArbTimingRc */
			0x00000008,  /* McEmemArbTimingRas */
			0x0000000f,  /* McEmemArbTimingFaw */
			0x00000002,  /* McEmemArbTimingRrd */
			0x00000002,  /* McEmemArbTimingRap2Pre */
			0x00000009,  /* McEmemArbTimingWap2Pre */
			0x00000002,  /* McEmemArbTimingR2R */
			0x00000002,  /* McEmemArbTimingW2W */
			0x00000005,  /* McEmemArbTimingR2W */
			0x00000006,  /* McEmemArbTimingW2R */
			0x06030202,  /* McEmemArbDaTurns */
			0x000f080d,  /* McEmemArbDaCovers */
			0x70c8180e,  /* McEmemArbMisc0 */
			0x001f0000,  /* McEmemArbRing1Throttle */
			0xe8000000,  /* EmcFbioSpare */
			0xff00ff88,  /* EmcCfgRsv */
		},
		0x00000040,  /* EmcZcalWaitCnt */
		0x00020000,  /* EmcZcalInterval */
		0x00000000,  /* EmcCfg bit 27PERIODIC_QRST */
		0x80000931,  /* EmcMrs */
		0x80100002,  /* EmcEmrs */
		0x00000000,  /* EmcMrw1 */
		0x00000000,  /* EmcCfg bit 28 DYN_SELF_REF */
	},
#if 0
	{
		0x32,       /* Rev 3.2 */
		667000,     /* SDRAM frequency [kHz] */
		{
			0x0000001f,  /* EmcRc */
			0x000000ac,  /* EmcRfc */
			0x00000016,  /* EmcRas */
			0x00000007,  /* EmcRp */
			0x00000006,  /* EmcR2w */
			0x0000000b,  /* EmcW2r */
			0x00000003,  /* EmcR2p */
			0x00000010,  /* EmcW2p */
			0x00000007,  /* EmcRdRcd */
			0x00000007,  /* EmcWrRcd */
			0x00000003,  /* EmcRrd */
			0x00000001,  /* EmcRext */
			0x00000000,  /* EmcWext */
			0x00000006,  /* EmcWdv */
			0x00000009,  /* EmcQUse */
			0x00000007,  /* EmcQRst */
			0x0000000a,  /* EmcQSafe */
			0x0000000f,  /* EmcRdv */
			0x00001410,  /* EmcRefresh */
			0x00000000,  /* EmcBurstRefreshNum */
			0x00000504,  /* EmcPreRefreshReqCnt */
			0x0000000e,  /* EmcPdEx2Wr */
			0x0000000e,  /* EmcPdEx2Rd */
			0x00000007,  /* EmcPChg2Pden */
			0x00000000,  /* EmcAct2Pden */
			0x0000000c,  /* EmcAr2Pden */
			0x00000015,  /* EmcRw2Pden */
			0x000000b4,  /* EmcTxsr */
			0x00000200,  /* EmcTxsrDll */
			0x00000004,  /* EmcTcke */
			0x0000001e,  /* EmcTfaw */
			0x00000000,  /* EmcTrpab */
			0x00000006,  /* EmcTClkStable */
			0x00000007,  /* EmcTClkStop */
			0x00001450,  /* EmcTRefBw */
			0x0000000a,  /* EmcQUseExtra */
			0x00000006,  /* EmcFbioCfg6 */
			0x00000000,  /* EmcOdtWrite */
			0x00000000,  /* EmcOdtRead */
			0x00005088,  /* EmcFbioCfg5 */
			0xf00b0191,  /* EmcCfgDigDll */
			0x00008000,  /* EmcCfgDigDllPeriod */
			0x0000000a,  /* EmcDllXformDqs0 */
			0x0000000a,  /* EmcDllXformDqs1 */
			0x0000000a,  /* EmcDllXformDqs2 */
			0x0000000a,  /* EmcDllXformDqs3 */
			0x0000000a,  /* EmcDllXformDqs4 */
			0x0000000a,  /* EmcDllXformDqs5 */
			0x0000000a,  /* EmcDllXformDqs6 */
			0x0000000a,  /* EmcDllXformDqs7 */
			0x00000000,  /* EmcDllXformQUse0 */
			0x00000000,  /* EmcDllXformQUse1 */
			0x00000000,  /* EmcDllXformQUse2 */
			0x00000000,  /* EmcDllXformQUse3 */
			0x00000000,  /* EmcDllXformQUse4 */
			0x00000000,  /* EmcDllXformQUse5 */
			0x00000000,  /* EmcDllXformQUse6 */
			0x00000000,  /* EmcDllXformQUse7 */
			0x00000000,  /* EmcDliTrimTxDqs0 */
			0x00000000,  /* EmcDliTrimTxDqs1 */
			0x00000000,  /* EmcDliTrimTxDqs2 */
			0x00000000,  /* EmcDliTrimTxDqs3 */
			0x00000000,  /* EmcDliTrimTxDqs4 */
			0x00000000,  /* EmcDliTrimTxDqs5 */
			0x00000000,  /* EmcDliTrimTxDqs6 */
			0x00000000,  /* EmcDliTrimTxDqs7 */
			0x0000000a,  /* EmcDllXformDq0 */
			0x0000000a,  /* EmcDllXformDq1 */
			0x0000000a,  /* EmcDllXformDq2 */
			0x0000000a,  /* EmcDllXformDq3 */
			0x000002a0,  /* EmcXm2CmdPadCtrl */
			0x0800013d,  /* EmcXm2DqsPadCtrl2 */
			0x22220000,  /* EmcXm2DqPadCtrl2 */
			0x77fff884,  /* EmcXm2ClkPadCtrl */
			0x01f1f508,  /* EmcXm2CompPadCtrl */
			0x07077404,  /* EmcXm2VttGenPadCtrl */
			0x54000000,  /* EmcXm2VttGenPadCtrl2 */
			0x080001e8,  /* EmcXm2QUsePadCtrl */
			0x08000021,  /* EmcXm2DqsPadCtrl3 */
			0x00000802,  /* EmcCttTermCtrl */
			0x00020000,  /* EmcZcalInterval */
			0x00000040,  /* EmcZcalWaitCnt */
			0x0196000c,  /* EmcMrsWaitCnt */
			0x001fffff,  /* EmcAutoCalInterval */
			0x00000000,  /* EmcCtt */
			0x00000000,  /* EmcCttDuration */
			0x800028a0,  /* EmcDynSelfRefControl */
			0x0000000a,  /* McEmemArbCfg */
			0x80000078,  /* McEmemArbOutstandingReq */
			0x00000003,  /* McEmemArbTimingRcd */
			0x00000004,  /* McEmemArbTimingRp */
			0x00000010,  /* McEmemArbTimingRc */
			0x0000000a,  /* McEmemArbTimingRas */
			0x0000000f,  /* McEmemArbTimingFaw */
			0x00000002,  /* McEmemArbTimingRrd */
			0x00000003,  /* McEmemArbTimingRap2Pre */
			0x0000000b,  /* McEmemArbTimingWap2Pre */
			0x00000002,  /* McEmemArbTimingR2R */
			0x00000002,  /* McEmemArbTimingW2W */
			0x00000004,  /* McEmemArbTimingR2W */
			0x00000007,  /* McEmemArbTimingW2R */
			0x07040202,  /* McEmemArbDaTurns */
			0x00130b10,  /* McEmemArbDaCovers */
			0x70ea1e11,  /* McEmemArbMisc0 */
			0x001f0000,  /* McEmemArbRing1Throttle */
			0xe8000000,  /* EmcFbioSpare */
			0xff00ff49,  /* EmcCfgRsv */
		},
		0x00000040,  /* EmcZcalWaitCnt */
		0x00020000,  /* EmcZcalInterval */
		0x00000001,  /* EmcCfg bit 27PERIODIC_QRST */
		0x80000b51,  /* EmcMrs */
		0x80100002,  /* EmcEmrs */
		0x00000000,  /* EmcMrw1 */
		0x00000000,  /* EmcCfg bit 28 DYN_SELF_REF */
	},
//750
#endif
};

int apalis_t30_emc_init(void)
{
#if 1
	tegra_init_emc(apalis_t30_emc_tables_mt41k256m16re_15e,
			ARRAY_SIZE(apalis_t30_emc_tables_mt41k256m16re_15e));
#else
	tegra_init_emc(cardhu_emc_tables_h5tc2g_a2,
			ARRAY_SIZE(cardhu_emc_tables_h5tc2g_a2));
#endif
	return 0;
}