// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
 * Copyright 2018-2019 Toradex
 */

#include <dt-bindings/gpio/gpio.h>
#include "dt-bindings/pwm/pwm.h"
#include "imx8qxp.dtsi"

/ {
	model = "Toradex Apalis iMX8QXP/DX Module";
	compatible = "toradex,apalis-imx8x",
		     "fsl,imx8qxp";

        backlight: backlight {
		compatible = "pwm-backlight";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_bkl_on>;
		enable-gpios = <&lsio_gpio3 13 GPIO_ACTIVE_HIGH>;
		status = "disabled";
        };

	chosen {
		stdout-path = &lpuart1;
	};

	display_lcdif: display@disp1 {
		compatible = "fsl,imx-lcdif-mux-display";
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_lcdif>;
		clocks = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_BYPASS>,
			 <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_MISC0>;
		clock-names = "bypass_div", "pixel";
		assigned-clocks = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_MISC0>;
		assigned-clock-parents = <&clk IMX_SC_R_LCD_0 IMX_SC_PM_CLK_BYPASS>;
		fsl,lcdif-mux-regs = <&lcdif_mux_regs>;
		fsl,interface-pix-fmt = "rgb666";
		power-domains = <&pd IMX_SC_R_LCD_0>;
		status = "disabled";

		port@0 {
			reg = <0>;

			lcd_display_in: endpoint {
				remote-endpoint = <&dpu_disp1_lcdif>;
			};
		};
	};

	gpio-fan {
		compatible = "gpio-fan";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio8>;
		gpios = <&lsio_gpio3 20 GPIO_ACTIVE_HIGH>;
		gpio-fan,speed-map = <   0 0
				      3000 1>;
        };

	/* Apalis WAKE1_MICO */
	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_keys>;
		status = "disabled";

		wakeup_key: wakeup-key {
			label = "Wake-Up";
			gpios = <&lsio_gpio1 26 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WAKEUP>;
			debounce-interval = <10>;
			wakeup-source;
		};
	};

	imx8x_cm4: imx8x_cm4@0 {
		compatible = "fsl,imx8qxp-cm4";
		rsc-da = <0x90000000>;
		mbox-names = "tx", "rx", "rxdb";
		mboxes = <&lsio_mu5 0 1
			  &lsio_mu5 1 1
			  &lsio_mu5 3 1>;
		mub-partition = <3>;
		memory-region = <&vdev0vring0>, <&vdev0vring1>, <&vdevbuffer>,
				<&vdev1vring0>, <&vdev1vring1>;
		core-index = <0>;
		core-id = <IMX_SC_R_M4_0_PID0>;
		status = "okay";
		power-domains = <&pd IMX_SC_R_M4_0_PID0>,
				<&pd IMX_SC_R_M4_0_MU_1A>;
        };

	panel_lvds: panel-lvds {
		compatible = "panel-lvds";
		backlight = <&backlight>;

		status = "disabled";

		port {
			panel_lvds_in: endpoint {
				remote-endpoint = <&lvds0_out>;
			};
		};
	};

	reg_module_3v3: regulator-module-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "+V3.3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	reg_module_3v3_avdd: regulator-module-3v3-avdd {
		compatible = "regulator-fixed";
		regulator-name = "+V3.3_AVDD_AUDIO";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	reg_module_vref_1v8: regulator-vref-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "vref-1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};

	reg_pcie_switch: regulator-pcie-switch {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio7>;
		enable-active-high;
		gpio = <&lsio_gpio3 19 GPIO_ACTIVE_HIGH>;
		regulator-name = "pcie_switch";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		startup-delay-us = <100000>;
	};

	reserved-memory {
                #address-cells = <2>;
                #size-cells = <2>;
                ranges;

		/*
		 * 0x8800_0000 ~ 0x8FFF_FFFF is reserved for M4
		 * Shouldn't be used at A core and Linux side.
		 *
		 */
		m4_reserved: m4@0x88000000 {
			no-map;
			reg = <0 0x88000000 0 0x8000000>;
		};

		rpmsg_reserved: rpmsg@0x90000000 {
			no-map;
			reg = <0 0x90200000 0 0x200000>;
		};

		decoder_boot: decoder-boot@84000000 {
			reg = <0 0x84000000 0 0x2000000>;
			no-map;
		};

		encoder_boot: encoder-boot@86000000 {
			reg = <0 0x86000000 0 0x200000>;
			no-map;
		};

		decoder_rpc: decoder-rpc@0x92000000 {
			reg = <0 0x92000000 0 0x200000>;
			no-map;
		};

		encoder_rpc: encoder-rpc@0x92200000 {
			reg = <0 0x92200000 0 0x200000>;
			no-map;
		};

		encoder_reserved: encoder_reserved@94400000 {
			no-map;
			reg = <0 0x94400000 0 0x800000>;
		};

		/* global autoconfigured region for contiguous allocations */
		linux,cma {
			compatible = "shared-dma-pool";
			reusable;
			size = <0 0x3c000000>;
			alloc-ranges = <0 0x96000000 0 0x3c000000>;
			linux,cma-default;
		};

		vdev0vring0: vdev0vring0@90000000 {
			compatible = "shared-dma-pool";
			reg = <0 0x90000000 0 0x8000>;
			no-map;
		};

		vdev0vring1: vdev0vring1@90008000 {
			compatible = "shared-dma-pool";
			reg = <0 0x90008000 0 0x8000>;
			no-map;
		};

		vdev1vring0: vdev1vring0@90010000 {
			compatible = "shared-dma-pool";
			reg = <0 0x90010000 0 0x8000>;
			no-map;
		};

		vdev1vring1: vdev1vring1@90018000 {
			compatible = "shared-dma-pool";
			reg = <0 0x90018000 0 0x8000>;
			no-map;
		};

		vdevbuffer: vdevbuffer {
			compatible = "shared-dma-pool";
			reg = <0 0x90400000 0 0x100000>;
			no-map;
		};
	};

	sound_card: sound-card {
		compatible = "simple-audio-card";
		simple-audio-card,bitclock-master = <&dailink_master>;
		simple-audio-card,format = "i2s";
		simple-audio-card,frame-master = <&dailink_master>;
		simple-audio-card,name = "imx8qxp-sgtl5000";

		dailink_master: simple-audio-card,codec {
			sound-dai = <&sgtl5000_a>;
			clocks = <&mclkout0_lpcg 0>;
		};

		simple-audio-card,cpu {
			sound-dai = <&sai1>;
		};
        };
};

/* Apalis AN1_ADC */
&adc0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_adc0>;
	vref-supply = <&reg_module_vref_1v8>;
};

/* Display Prefetch Resolve, (Tiling) */
&dc0_dpr1_channel1 {
	status = "okay";
};

&dc0_dpr1_channel2 {
	status = "okay";
};

&dc0_dpr1_channel3 {
	status = "okay";
};

&dc0_dpr2_channel1 {
	status = "okay";
};

&dc0_dpr2_channel2 {
	status = "okay";
};

&dc0_dpr2_channel3 {
	status = "okay";
};

&dc0_pc {
	status = "okay";
};

&dc0_prg1 {
	status = "okay";
};

&dc0_prg2 {
	status = "okay";
};

&dc0_prg3 {
	status = "okay";
};

&dc0_prg4 {
	status = "okay";
};

&dc0_prg5 {
	status = "okay";
};

&dc0_prg6 {
	status = "okay";
};

&dc0_prg7 {
	status = "okay";
};

&dc0_prg8 {
	status = "okay";
};

&dc0_prg9 {
	status = "okay";
};

&dpu1 {
	status = "okay";
};

&dpu_disp1_lcdif {
	remote-endpoint = <&lcd_display_in>;
};

/* Apalis Gigabit Ethernet */
&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_fec1>;
	fsl,magic-packet;
	fsl,rgmii_rxc_dly;
	fsl,rgmii_txc_dly;
	phy-handle = <&ethphy0>;
	phy-mode = "rgmii";
	phy-reset-duration = <10>;
	phy-reset-gpios = <&lsio_gpio3 4 GPIO_ACTIVE_LOW>;

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy0: ethernet-phy@4 {
			compatible = "ethernet-phy-ieee802.3-c22";
			interrupt-parent = <&lsio_gpio1>;
			interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
			micrel,led-mode = <0>;
			reg = <4>;
		};
	};
};

/* Apalis CAN1 */
&flexcan2 {
	/* define the following property to disable CAN-FD mode */
	/* disable-fd-mode; */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
};

/* Apalis CAN2 */
&flexcan3 {
	/* define the following property to disable CAN-FD mode */
	/* disable-fd-mode; */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan3>;
};

&gpu_3d0 {
        status = "okay";
};

/* On-module I2C */
&i2c0 {
        #address-cells = <1>;
        #size-cells = <0>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_lpi2c0>;
        clock-frequency = <100000>;
        status = "okay";

	/* On-Module EEPROM */
        eeprom: eeprom@50 {
		compatible = "atmel,24c02";
		reg = <0x50>;
		pagesize = <16>;
        };

	/* PCAL6416A GPIO Expander */
	pcal6416_1: gpio@20 {
		compatible = "nxp,pcal6416";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_exp1_int>;
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-parent = <&lsio_gpio4>;
		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
		vcc-supply = <&reg_module_3v3>;
		ngpios = <16>;
		gpio-line-names = "HDMI1_CEC", "SPDIF1_IN", "SPDIF1_OUT",
			"UART4_TXD", "UART1_DCD", "UART1_RI", "UART1_DSR",
			"UART1_DTR", "PWM1", "Wi-Fi_WKUP_WLAN",
			"Wi-Fi_W_DISABLE", "Wi-Fi_WKUP_BT", "Wi-Fi_PDn",
			"Wi-Fi_WKUP_HOST", "DSI_SW_SEL", "HDMI1_HPD";
	};

	/* PCAL6416A GPIO Expander */
	pcal6416_2: gpio@21 {
		compatible = "nxp,pcal6416";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c_exp2_int>;
		reg = <0x21>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-parent = <&lsio_gpio4>;
		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
		vcc-supply = <&reg_module_3v3>;
	};

	sgtl5000_a: sgtl5000@a {
		compatible = "fsl,sgtl5000";
		#sound-dai-cells = <0>;
		assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
				  <&aud_pll_div0_lpcg 0>,
				  <&aud_rec0_lpcg 0>,
				  <&mclkout0_lpcg 0>;
		assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>;
		clocks = <&mclkout0_lpcg 0>;
		clock-names = "mclk";
		reg = <0xa>;
		VDDA-supply = <&reg_module_3v3_avdd>;
		VDDIO-supply = <&reg_module_3v3>;
		VDDD-supply = <&reg_module_vref_1v8>;
	};
};

/* Apalis I2C2 (DDC) */
&i2c0_mipi_lvds1 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c0_mipi_lvds1>;
	clock-frequency = <100000>;
};

/* Apalis I2C1 */
&i2c1 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpi2c1>;
	clock-frequency = <100000>;
};

/* Apalis I2C3 (CAM) */
&i2c3 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpi2c3>;
	clock-frequency = <100000>;
};

&imx8_gpu_ss {
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_dap1_gpios>, <&pinctrl_gpio3>, <&pinctrl_gpio4>,
		    <&pinctrl_mmc1_gpios>, <&pinctrl_qspi0a_gpios>, <&pinctrl_sata1_act>,
		    <&pinctrl_usbo1oc>, <&pinctrl_wifi_sclk>;

	apalis-imx8qxp {
		/* Apalis AN1_ADC */
		pinctrl_adc0: adc0grp {
			fsl,pins = <
				/* Apalis AN1_ADC0 */
				IMX8QXP_ADC_IN0_ADMA_ADC_IN0			0x60		/* MXM3 305 */
				/* Apalis AN1_ADC1 */
				IMX8QXP_ADC_IN1_ADMA_ADC_IN1			0x60		/* MXM3 307 */
				/* Apalis AN1_ADC2 */
				IMX8QXP_ADC_IN4_ADMA_ADC_IN4			0x60		/* MXM3 309 */
				/* Apalis AN1_TSWIP_ADC3 */
				IMX8QXP_ADC_IN5_ADMA_ADC_IN5			0x60		/* MXM3 311 */
			>;
		};

		/* Apalis BKL1_ON */
		pinctrl_gpio_bkl_on: gpio-bkl-on {
			fsl,pins = <
				IMX8QXP_QSPI0A_DQS_LSIO_GPIO3_IO13		0x21		/* MXM3 286 */
			>;
		};

		/* Apalis BKL1_PWM */
		pinctrl_pwm_mipi_lvds1: pwmmipilvds1grp {
			fsl,pins = <
				IMX8QXP_MIPI_DSI1_GPIO0_00_MIPI_DSI1_PWM0_OUT	0x60		/* MXM3 239 */
			>;
		};

		/* Apalis CAN1 */
		pinctrl_flexcan2: flexcan2grp {
			fsl,pins = <
				IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX		0x21		/* MXM3 14 */
				IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX		0x21		/* MXM3 12 */
			>;
		};

		/* Apalis CAN2 */
		pinctrl_flexcan3: flexcan3grp {
			fsl,pins = <
				IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX		0x21		/* MXM3 18 */
				IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX		0x21		/* MXM3 16 */
			>;
		};

		/* Apalis DAP1 */
		pinctrl_dap1_gpios: dap1gpiosgrp {
			fsl,pins = <
				/* Apalis DAP1_D_OUT */
				IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25		0x21		/* MXM3 196 */
				/* Apalis DAP1_RESET */
				IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15		0x21		/* MXM3 198 */
				/* Apalis DAP1_BIT_CLK */
				IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26		0x21		/* MXM3 200 */
				/* Apalis DAP1_D_IN */
				IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27		0x21		/* MXM3 202 */
				/* Apalis DAP1_SYNC */
				IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28		0x21		/* MXM3 204 */
			>;
		};

		/* Apalis GPIO1 */
		pinctrl_gpio1: gpio1grp {
			fsl,pins = <
				IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21		0x21		/* MXM3 1 */
			>;
		};

		/* Apalis GPIO2 */
		pinctrl_gpio2: gpio2grp {
			fsl,pins = <
				IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22		0x21		/* MXM3 3 */
			>;
		};

		/* Apalis GPIO3 */
		pinctrl_gpio3: gpio3grp {
			fsl,pins = <
				IMX8QXP_QSPI0B_SS0_B_LSIO_GPIO3_IO23		0x21		/* MXM3 5 */
			>;
		};

		/* Apalis GPIO4 */
		pinctrl_gpio4: gpio4grp {
			fsl,pins = <
				IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24		0x21		/* MXM3 7 */
			>;
		};

		/* Apalis GPIO5 */
		pinctrl_gpio5: gpio5grp {
			fsl,pins = <
				IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17		0x21		/* MXM3 11 */
			>;
		};

		/* Apalis GPIO6 */
		pinctrl_gpio6: gpio6grp {
			fsl,pins = <
				IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18		0x21		/* MXM3 13 */
			>;
		};

		/* Apalis GPIO7 */
		pinctrl_gpio7: gpio7grp {
			fsl,pins = <
				IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19		0x21		/* MXM3 15 */
			>;
		};

		/* Apalis GPIO8 */
		pinctrl_gpio8: gpio8grp {
			fsl,pins = <
				IMX8QXP_QSPI0B_DATA2_LSIO_GPIO3_IO20		0x21		/* MXM3 17 */
			>;
		};

		/* Apalis I2C1 */
		pinctrl_lpi2c1: lpi2c1grp {
			fsl,pins = <
				IMX8QXP_USB_SS3_TC0_ADMA_I2C1_SCL		0x06000021	/* MXM3 211 */
				IMX8QXP_USB_SS3_TC3_ADMA_I2C1_SDA		0x06000021	/* MXM3 209 */
			>;
		};

		/* Apalis I2C2 (DDC) */
		pinctrl_i2c0_mipi_lvds1: mipilvds1i2c0grp {
			fsl,pins = <
				IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL	0xc6000020	/* MXM3 205 */
				IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA	0xc6000020	/* MXM3 207 */
			>;
		};

		/* Apalis I2C3 (CAM) */
		pinctrl_lpi2c3: lpi2c3grp {
			fsl,pins = <
				IMX8QXP_CSI_EN_ADMA_I2C3_SCL			0xc6000020	/* MXM3 203 */
				IMX8QXP_CSI_RESET_ADMA_I2C3_SDA			0xc6000020	/* MXM3 201 */
			>;
		};

		/* Apalis MMC1_ */
		pinctrl_mmc1_gpios: mmc1gpiosgrp {
			fsl,pins = <
				IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10		0x21		/* MXM3 148 */
				IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14		0x21		/* MXM3 158 */
				IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21		0x21		/* MXM3 156 */
				IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19		0x21		/* MXM3 152 */
			>;
		};

		/* Apalis MMC1_CD# */
		pinctrl_usdhc2_gpio: mmc1gpiogrp {
			fsl,pins = <
				IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22		0x06000021	/* MXM3 164 */
			>;
		};

		pinctrl_usdhc2_gpio_sleep: usdhc1gpioslpgrp {
			fsl,pins = <
				IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22		0x60		/* MXM3 164 */
			>;
		};

		/* Apalis MMC1 */
		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK		0x06000041	/* MXM3 154 */
				IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD		0x21		/* MXM3 150 */
				IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0		0x21		/* MXM3 160 */
				IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1		0x21		/* MXM3 162 */
				IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2		0x21		/* MXM3 144 */
				IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3		0x21		/* MXM3 146 */
				IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x21
			>;
		};

		pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
			fsl,pins = <
				IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK		0x06000041	/* MXM3 154 */
				IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD		0x21		/* MXM3 150 */
				IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0		0x21		/* MXM3 160 */
				IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1		0x21		/* MXM3 162 */
				IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2		0x21		/* MXM3 144 */
				IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3		0x21		/* MXM3 146 */
				IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x21
			>;
		};

		pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
			fsl,pins = <
				IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK		0x06000041	/* MXM3 154 */
				IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD		0x21		/* MXM3 150 */
				IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0		0x21		/* MXM3 160 */
				IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1		0x21		/* MXM3 162 */
				IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2		0x21		/* MXM3 144 */
				IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3		0x21		/* MXM3 146 */
				IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x21
			>;
		};

		pinctrl_usdhc2_sleep: usdhc2slpgrp {
			fsl,pins = <
				IMX8QXP_USDHC1_CLK_LSIO_GPIO4_IO23		0x60		/* MXM3 154 */
				IMX8QXP_USDHC1_CMD_LSIO_GPIO4_IO24		0x60		/* MXM3 150 */
				IMX8QXP_USDHC1_DATA0_LSIO_GPIO4_IO25		0x60		/* MXM3 160 */
				IMX8QXP_USDHC1_DATA1_LSIO_GPIO4_IO26		0x60		/* MXM3 162 */
				IMX8QXP_USDHC1_DATA2_LSIO_GPIO4_IO27		0x60		/* MXM3 144 */
				IMX8QXP_USDHC1_DATA3_LSIO_GPIO4_IO28		0x60		/* MXM3 146 */
				IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x21
			>;
		};

		/* Apalis Parallel Camera */
		pinctrl_parallel_csi: parallelcsigrp {
			fsl,pins = <
				IMX8QXP_CSI_D00_CI_PI_D02			0xC0000041	/* MXM3 187 */
				IMX8QXP_CSI_D01_CI_PI_D03			0xC0000041	/* MXM3 185 */
				IMX8QXP_CSI_D02_CI_PI_D04			0xC0000041	/* MXM3 183 */
				IMX8QXP_CSI_D03_CI_PI_D05			0xC0000041	/* MXM3 181 */
				IMX8QXP_CSI_D04_CI_PI_D06			0xC0000041	/* MXM3 179 */
				IMX8QXP_CSI_D05_CI_PI_D07			0xC0000041	/* MXM3 177 */
				IMX8QXP_CSI_D06_CI_PI_D08			0xC0000041	/* MXM3 175 */
				IMX8QXP_CSI_D07_CI_PI_D09			0xC0000041	/* MXM3 173 */
				IMX8QXP_CSI_MCLK_CI_PI_MCLK			0xC0000041	/* MXM3 193 */
				IMX8QXP_CSI_PCLK_CI_PI_PCLK			0xC0000041	/* MXM3 191 */
				IMX8QXP_CSI_HSYNC_CI_PI_HSYNC			0xC0000041	/* MXM3 197 */
				IMX8QXP_CSI_VSYNC_CI_PI_VSYNC			0xC0000041	/* MXM3 195 */
			>;
		};

		/* Apalis Parallel RGB LCD Interface */
		pinctrl_hog0: hog0grp {
			fsl,pins = <
				IMX8QXP_COMP_CTL_GPIO_1V8_3V3_GPIORHB_PAD	0x000514a0 /* Use pads in 3.3V mode */
			>;
		};

		pinctrl_lcdif: lcdif-pins {
			fsl,pins = <
				IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK		0x60		/* MXM3 243 */
				IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC		0x60		/* MXM3 245 */
				IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC		0x60		/* MXM3 247 */
				IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN			0x60		/* MXM3 249 */
				IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12		0x60		/* MXM3 255 */
				IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13			0x60		/* MXM3 257 */
				IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14			0x60		/* MXM3 259 */
				IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15			0x60		/* MXM3 261 */
				IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16			0x60		/* MXM3 263 */
				IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17		0x60		/* MXM3 265 */
				IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06		0x60		/* MXM3 273 */
				IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07		0x60		/* MXM3 275 */
				IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08		0x60		/* MXM3 277 */
				IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09		0x60		/* MXM3 279 */
				IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10		0x60		/* MXM3 281 */
				IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11		0x60		/* MXM3 283 */
				IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00		0x60		/* MXM3 291 */
				IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01		0x60		/* MXM3 293 */
				IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02		0x60		/* MXM3 295 */
				IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03		0x60		/* MXM3 297 */
				IMX8QXP_ESAI0_TX0_ADMA_LCDIF_D04		0x60		/* MXM3 299 */
				IMX8QXP_ESAI0_TX1_ADMA_LCDIF_D05		0x60		/* MXM3 301 */
			>;
		};

		/* Apalis PWM1 */
		pinctrl_pwm2: pwm2grp {
			fsl,pins = <
				IMX8QXP_UART1_RTS_B_LSIO_PWM2_OUT		0x60		/* MXM3 2 */
			>;
		};

		/* Apalis PWM2 */
		pinctrl_pwm_mipi_lvds0: pwmmipilvds0grp {
			fsl,pins = <
				IMX8QXP_MIPI_DSI0_GPIO0_00_MIPI_DSI0_PWM0_OUT	0x60		/* MXM3 4 */
			>;
		};

		/* Apalis PWM_ */
		pinctrl_pwm_gpios: gpiospwmgrp {
			fsl,pins = <
				IMX8QXP_MIPI_DSI0_GPIO0_01_LSIO_GPIO1_IO28	0x21		/* MXM3 6 */
				IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00	0x21		/* MXM3 8 */
			>;
		};

		/* Apalis SATA1_ACT# */
		pinctrl_sata1_act: sata1actgrp {
			fsl,pins = <
				IMX8QXP_MIPI_DSI0_I2C0_SCL_LSIO_GPIO1_IO25	0x21		/* MXM3 35 */
			>;
		};

		/* Apalis SPI1 */
		pinctrl_lpspi0: lpspi0grp {
			fsl,pins = <
				IMX8QXP_SPI0_CS0_LSIO_GPIO1_IO08		0x06000040	/* MXM3 227 */
				IMX8QXP_SPI0_SDI_ADMA_SPI0_SDI			0x06000040	/* MXM3 223 */
				IMX8QXP_SPI0_SDO_ADMA_SPI0_SDO			0x06000040	/* MXM3 225 */
				IMX8QXP_SPI0_SCK_ADMA_SPI0_SCK			0x06000040	/* MXM3 221 */
			>;
		};

		/* Apalis SPI2 */
		pinctrl_lpspi2: lpspi2grp {
			fsl,pins = <
				IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00		0x21		/* MXM3 233 */
				IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI			0x06000040	/* MXM3 229 */
				IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO			0x06000040	/* MXM3 231 */
				IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK			0x06000040	/* MXM3 235 */
			>;
		};

		/* Apalis UART1 */
		pinctrl_lpuart1: lpuart1grp {
			fsl,pins = <
				IMX8QXP_UART1_RX_ADMA_UART1_RX			0x06000020	/* MXM3 118 */
				IMX8QXP_UART1_TX_ADMA_UART1_TX			0x06000020	/* MXM3 112 */
			>;
		};

		/* Apalis UART1_ */
		pinctrl_qspi0a_gpios: qspi0agpiosgrp {
			fsl,pins = <
				IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11		0x21		/* MXM3 114 */
				IMX8QXP_QSPI0A_DATA3_LSIO_GPIO3_IO12		0x21		/* MXM3 116 */
			>;
		};

		/* Apalis UART2 */
		pinctrl_lpuart0: lpuart0grp {
			fsl,pins = <
				IMX8QXP_UART0_TX_ADMA_UART0_TX			0x06000020	/* MXM3 126 */
				IMX8QXP_UART0_RX_ADMA_UART0_RX			0x06000020	/* MXM3 132 */
				IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B		0x06000020	/* MXM3 128 */
				IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B		0x06000020	/* MXM3 130 */
			>;
		};

		/* Apalis UART3 */
		pinctrl_lpuart2: lpuart2grp {
			fsl,pins = <
				IMX8QXP_UART2_TX_ADMA_UART2_TX			0x06000020	/* MXM3 134 */
				IMX8QXP_UART2_RX_ADMA_UART2_RX			0x06000020	/* MXM3 136 */
			>;
		};

		/* Apalis UART4 */
		pinctrl_lpuart3: lpuart3grp {
			fsl,pins = <
				IMX8QXP_SCU_GPIO0_01_ADMA_UART3_TX		0x06000020	/* MXM3 138 */
				IMX8QXP_SCU_GPIO0_00_ADMA_UART3_RX		0x06000020	/* MXM3 140 */
			>;
		};

		/* Apalis USBH_EN */
		pinctrl_usbh_en: usbhen {
			fsl,pins = <
				IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04		0x21		/* MXM3 84 */
			>;
		};

		/* Apalis USBH_OC# */
		pinctrl_gpio_usbh_oc_n: gpiousbhocn {
			fsl,pins = <
				IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09		0x04000020	/* MXM3 96 */
			>;
		};

		/* Apalis USBO1_EN */
		pinctrl_usbo1_en: usbo1en {
			fsl,pins = <
				/* Apalis USBO1_EN */
				IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16		0x21		/* MXM3 274 */
			>;
		};

		/* Apalis USBO1 */
		pinctrl_usbo1oc: usbo1oc {
			fsl,pins = <
				/* Apalis USBO1_OC# */
				IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05		0x04000020	/* MXM3 262 */
			>;
		};

		/* Apalis WAKE1_MICO */
		pinctrl_gpio_keys: gpio-keys {
			fsl,pins = <
				IMX8QXP_MIPI_DSI0_I2C0_SDA_LSIO_GPIO1_IO26	0x06680021	/* MXM3 37 */
			>;
		};

		/* On-module Gigabit Ethernet PHY Micrel KSZ9031 */
		pinctrl_fec1: fec1grp {
			fsl,pins = <
				IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD	0x14a0 /* Use pads in 3.3V mode */
				IMX8QXP_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1_PAD	0x14a0 /* Use pads in 3.3V mode */
				IMX8QXP_ENET0_MDC_CONN_ENET0_MDC		0x06000020
				IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO		0x06000020
				IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL	0x61
				IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC	0x61
				IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0	0x61
				IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1	0x61
				IMX8QXP_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2	0x61
				IMX8QXP_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3	0x61
				IMX8QXP_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC	0x61
				IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL	0x61
				IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0	0x61
				IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1	0x61
				IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2	0x61
				IMX8QXP_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3	0x61
				/* On-module ETH_RESET# */
				IMX8QXP_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04	0x21
				/* On-module ETH_INT# */
				IMX8QXP_ADC_IN2_LSIO_GPIO1_IO12			0x21
			>;
		};

		/* On-module GPIO expanders */
		pinctrl_i2c_exp1_int: i2cexp1int {
			fsl,pins = <
				IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02	0x21
			>;
		};

		pinctrl_i2c_exp2_int: i2cexp2int {
			fsl,pins = <
				IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00	0x21
			>;
		};

		/* On-module eMMC */
		pinctrl_usdhc1: usdhc1grp {
			fsl,pins = <
				IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK		0x06000041
				IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD		0x21
				IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0		0x21
				IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1		0x21
				IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2		0x21
				IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3		0x21
				IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4		0x21
				IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5		0x21
				IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6		0x21
				IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7		0x21
				IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE		0x41
				IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B	0x21
			>;
		};

		pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
			fsl,pins = <
				IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK		0x06000041
				IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD		0x21
				IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0		0x21
				IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1		0x21
				IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2		0x21
				IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3		0x21
				IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4		0x21
				IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5		0x21
				IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6		0x21
				IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7		0x21
				IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE		0x41
				IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B	0x21
			>;
		};

		pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
			fsl,pins = <
				IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK		0x06000041
				IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD		0x21
				IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0		0x21
				IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1		0x21
				IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2		0x21
				IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3		0x21
				IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4		0x21
				IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5		0x21
				IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6		0x21
				IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7		0x21
				IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE		0x41
				IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B	0x21
			>;
		};

		/* On-module I2C */
		pinctrl_lpi2c0: i2c0csi0grp {
			fsl,pins = <
				IMX8QXP_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL 	0xc6000020	/* MXM3 140 */
				IMX8QXP_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA 	0xc6000020	/* MXM3 142 */
			>;
		};

		/* On-module I2S SGTL5000 for Apalis Analogue Audio */
		pinctrl_sai1: sai1grp {
			fsl,pins = <
				IMX8QXP_SAI1_RXD_ADMA_SAI1_RXD			0x06000040
				IMX8QXP_SPI0_CS1_ADMA_SAI1_TXD			0x06000040
				IMX8QXP_SAI1_RXC_ADMA_SAI1_TXC			0x06000040
				IMX8QXP_SAI1_RXFS_ADMA_SAI1_TXFS		0x06000040
			>;
		};

		/* On-module I2S SGTL5000 SYS_MCLK */
		pinctrl_sgtl5000: sgtl5000grp {
			fsl,pins = <
				IMX8QXP_ADC_IN3_ADMA_ACM_MCLK_OUT0		0x21
			>;
		};

		/* On-module RESET_MOCI#_DRV */
		pinctrl_reset_moci: gpioresetmocigrp {
			fsl,pins = <
				IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01	0x11
			>;
		};

		pinctrl_wifi_sclk: wifigrp {
			fsl,pins = <
				IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x20		/* WiFi Sleep clock */
			>;
		};
	};
};

&ldb1_phy {
	status = "disabled";
};

&ldb1 {
	status = "disabled";

	lvds-channel@0 {
		fsl,data-mapping = "spwg";
		fsl,data-width = <24>;
		status = "okay";

		port@1 {
			reg = <1>;

			lvds0_out: endpoint {
				remote-endpoint = <&panel_lvds_in>;
			};
		};
	};
};

/* Apalis SPI1 */
&lpspi0 {
	#address-cells = <1>;
	#size-cells = <0>;
	fsl,spi-num-chipselects = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpspi0>;
	cs-gpios = <&lsio_gpio1 8 GPIO_ACTIVE_LOW>;
};

/* Apalis SPI2 */
&lpspi2 {
	#address-cells = <1>;
	#size-cells = <0>;
	fsl,spi-num-chipselects = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpspi2>;
	cs-gpios = <&lsio_gpio1 0 GPIO_ACTIVE_LOW>;
};

/* Apalis UART2 */
&lpuart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpuart0>;
};

/* Apalis UART1 */
&lpuart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpuart1>;
};

/* Apalis UART3 */
&lpuart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpuart2>;
};

/* Apalis UART4 */
&lpuart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpuart3>;
};

&lsio_gpio0 {
	gpio-line-names = "",
			  "MXM3_293",
			  "MXM3_295",
			  "MXM3_297",
			  "MXM3_299",
			  "MXM3_301",
			  "MXM3_273",
			  "MXM3_275",
			  "MXM3_277",
			  "MXM3_279",
			  "MXM3_281",
			  "MXM3_283",
			  "MXM3_255",
			  "MXM3_257",
			  "MXM3_259",
			  "MXM3_261",
			  "MXM3_247",
			  "",
			  "",
			  "MXM3_245",
			  "MXM3_243",
			  "MXM3_112",
			  "MXM3_118",
			  "",
			  "MXM3_265",
			  "MXM3_196",
			  "MXM3_200",
			  "MXM3_202",
			  "MXM3_204",
			  "MXM3_310",
			  "MXM3_312",
			  "MXM3_318";
};

&lsio_gpio1 {
	gpio-line-names = "MXM3_235",
			  "MXM3_233",
			  "MXM3_231",
			  "MXM3_229",
			  "MXM3_221",
			  "MXM3_223",
			  "MXM3_225",
			  "MXM3_316",
			  "MXM3_227",
			  "MXM3_307",
			  "MXM3_305",
			  "MXM3_194",
			  "",
			  "MXM3_311",
			  "MXM3_309",
			  "MXM3_128",
			  "MXM3_130",
			  "MXM3_12",
			  "MXM3_14",
			  "MXM3_16",
			  "MXM3_18",
			  "MXM3_132",
			  "MXM3_126",
			  "MXM3_134",
			  "MXM3_136",
			  "MXM3_35",
			  "MXM3_37",
			  "MXM3_4",
			  "MXM3_6",
			  "MXM3_207",
			  "MXM3_205",
			  "MXM3_239";
};

&lsio_gpio2 {
	gpio-line-names = "MXM3_8",
			  "",
			  "",
			  "MXM3_140";
};

&lsio_gpio3 {
	gpio-line-names = "MXM3_191",
			  "MXM3_193",
			  "MXM3_203",
			  "MXM3_201",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "MXM3_96",
			  "MXM3_110",
			  "MXM3_114",
			  "MXM3_116",
			  "MXM3_286",
			  "MXM3_158",
			  "MXM3_198",
			  "MXM3_274",
			  "MXM3_11",
			  "MXM3_13",
			  "MXM3_15",
			  "MXM3_17",
			  "MXM3_1",
			  "MXM3_3",
			  "MXM3_5",
			  "MXM3_7";
};

&lsio_gpio4 {
	gpio-line-names = "",
			  "",
			  "",
			  "MXM3_211",
			  "MXM3_84",
			  "MXM3_262",
			  "MXM3_209",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "",
			  "MXM3_152",
			  "MXM3_148",
			  "MXM3_156",
			  "MXM3_164",
			  "MXM3_154",
			  "MXM3_150",
			  "MXM3_160",
			  "MXM3_162",
			  "MXM3_144",
			  "MXM3_146",
			  "MXM3_77",
			  "MXM3_79",
			  "MXM3_65";

	reset {
		gpio-hog;
		gpios = <&lsio_gpio4 1 GPIO_ACTIVE_LOW>;
		output-high;
	};
};

&lsio_gpio5 {
	gpio-line-names = "MXM3_67",
			  "MXM3_71",
			  "MXM3_73",
			  "MXM3_113",
			  "MXM3_115",
			  "MXM3_119",
			  "MXM3_121",
			  "MXM3_125",
			  "MXM3_127",
			  "MXM3_131",
			  "MXM3_59",
			  "MXM3_61";
};

&mipi_csi_0 {
	#address-cells = <1>;
	#size-cells = <0>;
	/delete-property/virtual-channel;
};

&mipi0_dsi_host {
	pwr-delay = <10>;
};

&mipi1_dsi_host {
	pwr-delay = <10>;
};

/* Apalis PCIE1 */
&pcieb {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_reset_moci>;
	bus-range = <0x00 0xff>;
	ext_osc = <0>;
	fsl,max-link-speed = <2>;
	reserved-region = <&rpmsg_reserved>;
	/*
	 * Workaround: Handle reset as a gpio-hog in &lsio_gpio4
	 * reset-gpio = <&lsio_gpio4 1 GPIO_ACTIVE_LOW>;
	 */
	vpcie-supply = <&reg_pcie_switch>;
};

/* Apalis PWM2 */
&pwm_mipi_lvds0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm_mipi_lvds0>;
	#pwm-cells = <3>;
};

/* Apalis BKL1_PWM */
&pwm_mipi_lvds1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm_mipi_lvds1>;
	#pwm-cells = <3>;
};

/* Apalis PWM1 */
&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>;
	#pwm-cells = <3>;
};

&rpmsg{
	/*
	 * 64K for one rpmsg instance:
	 */
	vdev-nums = <2>;
	reg = <0x0 0x90000000 0x0 0x20000>;
        memory-region = <&vdevbuffer>;
	status = "okay";
};

/* On-module I2S */
&sai1 {
	#sound-dai-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai1>;
	status = "okay";
};

&thermal_zones {
	pmic-thermal0 {
		polling-delay-passive = <250>;
		polling-delay = <2000>;
		thermal-sensors = <&tsens IMX_SC_R_PMIC_0>;
		trips {
			pmic_alert0: trip0 {
				temperature = <110000>;
				hysteresis = <2000>;
				type = "passive";
			};
			pmic_crit0: trip1 {
				temperature = <125000>;
				hysteresis = <2000>;
				type = "critical";
			};
		};
		cooling-maps {
			map0 {
				trip = <&pmic_alert0>;
				cooling-device =
					<&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
					<&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
					<&A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
					<&A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
			};
		};
	};
};

/* Manage on-module USB WiFi */
&usb3phynop1 {
	status = "okay";
	reset-on-resume;
};

/*
 * Apalis USB 3.0 Host. Serves USB 3.0 4-port hub on module and
 * USB 3.0 ports on-board
 */
&usbotg3 {
	dr_mode = "host";
	status = "okay";
};

/* On-module eMMC */
&usdhc1 {
	bus-width = <8>;
	non-removable;
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc1>;
	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
	status = "okay";
};

/* Apalis MMC1 */
&usdhc2 {
	bus-width = <4>;
	cd-gpios = <&lsio_gpio4 22 GPIO_ACTIVE_LOW>;
	disable-wp;
	pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
	pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>;
	vmmc-supply = <&reg_module_3v3>;
};

&vpu_decoder {
	boot-region = <&decoder_boot>;
	rpc-region = <&decoder_rpc>;
	reg-csr = <0x2d040000>;
	core_type = <1>;
};

&vpu_encoder {
	boot-region = <&encoder_boot>;
	rpc-region = <&encoder_rpc>;
	reserved-region = <&encoder_reserved>;
	reg-rpc-system = <0x40000000>;
	resolution-max = <1920 1920>;
	mbox-names = "enc1_tx0", "enc1_tx1", "enc1_rx";
	mboxes = <&mu1_m0 0 0
		  &mu1_m0 0 1
		  &mu1_m0 1 0>;

	core0@1020000 {
		compatible = "fsl,imx8-mu1-vpu-m0";
		reg = <0x1020000 0x20000>;
		reg-csr = <0x1050000 0x10000>;
		interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>;
		fsl,vpu_ap_mu_id = <17>;
		fw-buf-size = <0x200000>;
		rpc-buf-size = <0x80000>;
		print-buf-size = <0x80000>;
	};
};