// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright 2022 NXP */ #include "imx93-11x11-evk.dts" /{ aliases { /delete-property/ i2c0; }; }; /delete-node/&lpi2c1; /* * When add i2c devices on i3c bus, the reg property should be changed to: * reg = <0x1a 0x00 0x50>; * The first byte is still the address of the i2c device; * The second byte is always 0x00; * The third byte is the communication speed of this i2c device; * 0x20 means 1MHz(FM+); * 0x50 means 400KHz(FM); * In compatibility mode, I3C will use the slowest setting of all targets * for i2c communication. */ &i3c1 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_i3c1>; pinctrl-1 = <&pinctrl_i3c1>; i2c-scl-hz = <400000>; status = "okay"; codec: wm8962@1a { compatible = "wlf,wm8962"; reg = <0x1a 0x00 0x50>; clocks = <&clk IMX93_CLK_SAI3_GATE>; DCVDD-supply = <®_audio_pwr>; DBVDD-supply = <®_audio_pwr>; AVDD-supply = <®_audio_pwr>; CPVDD-supply = <®_audio_pwr>; MICVDD-supply = <®_audio_pwr>; PLLVDD-supply = <®_audio_pwr>; SPKVDD1-supply = <®_audio_pwr>; SPKVDD2-supply = <®_audio_pwr>; gpio-cfg = < 0x0000 /* 0:Default */ 0x0000 /* 1:Default */ 0x0000 /* 2:FN_DMICCLK */ 0x0000 /* 3:Default */ 0x0000 /* 4:FN_DMICCDAT */ 0x0000 /* 5:Default */ >; }; adv7535: hdmi@3d { compatible = "adi,adv7535"; reg = <0x3d 0x00 0x50>; adi,addr-cec = <0x3b>; adi,dsi-lanes = <4>; status = "okay"; port { adv7535_to_dsi: endpoint { remote-endpoint = <&dsi_to_adv7535>; }; }; }; /* i3c device with static i2c address*/ lsm6dso_i3c: imu@6a,208006c0000 { reg = <0x6a 0x208 0x6c0000>; assigned-address = <0x6a>; }; /* i2c devices */ }; &iomuxc { pinctrl_i3c1: i3c1grp { fsl,pins = < MX93_PAD_I2C1_SCL__I3C1_SCL 0x4000019e MX93_PAD_I2C1_SDA__I3C1_SDA 0x4000019e >; }; };