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NXP Display Mix clk-en Reset Controller
=======================================
This binding describes a reset controller device that is used to enable
or disable the internal clocks for all the submodules(such as, LCDIF,
MIPI DSI, MIPI CSI, ISI and etc) included by the Display Mix subsystem
on IMX8MM and IMX8MN platforms. Like sft-rstn, only assert and deassert
functions are required for submodule internal clocks enable or disable,
that means the clk-en can be treated as a real reset controller.
Please also refer to reset.txt in this directory for common reset
controller binding usage.
Required properties:
- compatible: Should be "fsl,imx8mm-dispmix-clk-en" or
"fsl,imx8mn-dispmix-clk-en".
- reg: should be register base and length as documented in the datasheet.
- clocks: phandle and clock specifier to disp apb clock for register access.
- clock-names: should be "disp-apb".
- power-domains: phandle to dispmix power domain.
- reset-cells: 1, see below.
example:
dispmix_clk_en: dispmix-clk-en@32e28004 {
compatible = "fsl,imx8mn-dispmix-clk-en";
reg = <0x0 0x32e28004 0x0 0x4>;
clocks = <&clk IMX8MN_CLK_DISP_APB_ROOT>;
clock-names = "disp-apb";
power-domains = <&dispmix_pd>;
#reset-cells = <1>;
};
Specifying clk-en control of devices
====================================
Device nodes in Display Mix should specify the reset channel required in
their "resets" property, containing a phandle to the clk-en device node
and an index to specify which channel to use, as described in
Documentation/devicetree/bindings/reset/reset.txt.
example:
lcdif_resets: lcdif-resets {
#address-cells = <1>;
#size-cells = <0>;
#reset-cells = <0>;
lcdif-clk-enable {
compatible = "lcdif,clk-enable";
resets = <&dispmix_clk_en IMX8MN_LCDIF_APB_CLK_EN>,
<&dispmix_clk_en IMX8MN_LCDIF_PIXEL_CLK_EN>;
};
};
Macro definitions for the supported reset channels can be found in:
include/dt-bindings/reset/imx8mm-dispmix.h and
include/dt-bindings/reset/imx8mn-dispmix.h.
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